Lon Works Interface Module Internal Structure - IDEC LonWorks FC3A-SX5LS1 User Manual

L W I
ON ORKS NTERFACE
L W Interface Module Internal Structure
ON ORKS
The L W interface module block diagram is illustrated in the figure below:
ON ORKS
CPU Module
Memory Map
The L W interface module memory map is illustrated in the figure below:
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FFFFh
Neuron Chip 3150 (6KB)
E800h
CFFFh
Register (4KB)
C000h
7FFFh
Flash
Memory
(32KB)
0000h
Flash Memory
The L W interface module contains a 32KB nonvolatile rewritable memory. Of the 32KB memory area, a 16KB
ON ORKS
area of 0000h through 3FFFh is allocated to the Neuron Chip firmware, and the remaining 16KB area of 4000h through
7FFFh is allocated to the application program.
14
M
ODULE
Flash
Memory
IO.6
Failure
RUN
Unused
Unused
Application
Program
(16KB)
4000h
3FFFh
Neuron Chip
Firmware
(16KB)
O N C L
PEN ET ONTROLLER ON
Status LED
Service Request Button
SER RUN ERR
LED
LED LED
SERVICE IO.0 IO.1
Neuron Chip 3150
IO.4
L W Interface Module
ON ORKS
W I M
ORKS NTERFACE ODULE
I/O
LED
IO.2
Transceiver
FTT-10A
Reserved for Memory
Map I/O (1KB)
Reserved (2.5KB)
EEPROM (0.5KB)
RAM (2KB)
U ' M
SER S ANUAL
L W
ON ORKS
Network
FFFFh
FC00h
F1FFh
F000h
E800h