Output Channel Diagnostics - Rockwell Automation Trusted TMR Manual

1. Description
The structure of each OFIU output driver is shown below:
24V V
FIELD
TOP_RAIL
POWER
COMMAND
RESPONSE
UPSTREAM
ENABLE
A sense resistor provides a means of continuously monitoring the output current, as
measured with an analogue to digital converter (ADC) channel. Closed loop control logic in
the Field Programmable Gate Array (FPGA) provides a Pulse-Ratio-Modulated drive signal to
the gate of FET 1 to maintain a constant current equal to the commanded output, based on
the ADC feedback.
A level translator transistor is used to drive the gate of FET 2. It provides FET 2 with a
negative gate voltage, to minimize its on resistance, and serves to hold FET 2 on in the event
that the secondary gate control loses power.
1.9.1.

Output Channel Diagnostics

The measured output channel current is continuously monitored relative to the commanded
output current, and compared to the current reported from each independent slice. In the
event that there is a discrepancy that falls outside the authority of the control loop to
overcome, then remedial action is engaged which disables FET 2 for the affected slice and
causes the surviving slices to compensate in order to maintain the commanded current to
the load.
The voltage across the load is also measured by each slice, and continuously compared for
equality. If there is a discrepancy between the slices, then the discrepant slice is removed
from service, and the survivors compensate to maintain the commanded current to the
load.
10
Trusted TMR Analogue Output Module – 40 Channel
5V
FPGA
OPTO
OPTO
Figure 4 Simplified Driver Circuit Diagram
Issue 15
GFSS
R
C
F
PRM
R
F
FET 1
FET 2
Rockwell Automation Publication ICSTT-RM284O-EN-P
S
ADC
DOWNSTREAM
ENABLE