Wiring Interface Signals; Figure 3-3 Wiring Interface Signals - Hitachi LQE550 User Manual

3 MOUNTING AND WIRING

3.3.2 Wiring interface signals

An example of typical wiring of the three units by CPU link modules (with cables having a
characteristic impedance of 150 Ω ) is shown below.
This is a basic wiring practice. To replace the module without exiting the communication state,
complete wiring as explained in "1.2.8 Note on replacing the module," in "S10V WIRING
MANUAL (manual number SVE-3-002)."
CPU link cable, up to 1 km
(CO-EX-SX 1P × 0.75SQ)
(CO-EV-SB 1P × 0.3SQ)
150Ω
CPU link module
(150Ω termination setting)
LQE550
150Ω termination
TERM
100
TERM
150
TB1
TA1
TB2
TA2
A
LINK1
B
SHD
A
LINK2
B
SHD
FG
CPU link module
(no termination)
LQE550
TERM
100
TERM
150
TB1
TA1
TB2
TA2
A
LINK1
B
SH
D
A
LINK2
B
SHD
FG
CPU link module
(150Ω termination setting)
LQE550
TERM
100
TERM 100
150
150 TB1
TA1
TB2
TA2
A
LINK1
B
SHD
A
LINK2
B
SHD
FG

Figure 3-3 Wiring Interface Signals

CPU LINK
LINK
MAIN/SUB
CPU No.
In wiring with cables having a characteristic
150Ω(A1)
impedance of 100Ω, connect terminal blocks
150Ω(A2)
B1 and B2 and set a 100Ω termination.
LINK2A(B6)
LINK2B(B7)
SHD(B8)
CPU LINK
LINK
MAIN/SUB
CPU No.
LINK1A(B3)
LINK1B(B4)
SHD(B5)
LINK2A(B6)
LINK2B(B7)
SHD(B8)
CPU LINK
LINK 150Ω termination setting
MAIN/SUB
CPU No. In wiring with cables having a characteristic
impedance of 100Ω, connect terminal blocks
B1 and B2 and set a 100Ω termination.
150Ω(A1)
150Ω(A2)
LINK1A(B3)
LINK1B(B4)
SHD(B5)
3-6