Interruptprocessing Inthe S5-155U/H - Siemens SIMATIC S5 1P 243 Equipment Manual

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With the S5–155U, the evaluation of interrupts is accomplished the same way as with the
the additional possibility of interrupt requests via interrupt lines, but it cannot be put to use directly
in connection with the 1P 243, as the hardware interrupts operate in level–triggered mode.
Proceed as described in section 4.3.2 when using a CPU 922 or a CPU 928A/B (edge-
triggered) in PLC S5-155U.
Indirect operation via the interrupt lines is possible, if the parameters in DX O were assigned
accordingly. This is only possible with an interrupt–capable, digital–input module to which the
desired 1P 243 signals are routed externally. The blocks OB 2 to OB 5 are defined as interrupt
blocks (S5-150U/S mode).
If interrupt evaluation in this manner is desired, see the S5–155U or S5–155H equipment
manual.
The evaluation of the input byte O is accomplished in the same way as in the S5– 150U/S systems;
for each bit of input byte O, an interrupt OB is allocated where the respective interrupt reaction is
filed.
A process interrupt is always initiated by a binary input (e.g., from the interrupt module 6ES5
432–4UA11. Again, this input is set by one of the binary outputs of the 1P 243. On the 1P 243, the
memory latch D9 must be exchanged for the soldering base D9 (included with delivery), which
serves as a connecting link between the binary signal/interrupt jumpering and the binary outputs.
The jumpers between the interrupt–line pins and the grounding contact M may not be altered
from their factory-delivered condition.
Attention: Operation of the 1P 243 and of the interrupt module 432-4 is possible in
the central or expansion rack. The 1P 243 and the interrupt module can also
be located in different module racks.
Example:
In the S5– 155U system, the difference amplifier 2 of an 1P 243 is connected to a conditioned ana-
log value AV1 and to the analog input channel A15. The output of the difference amplifier is
checked for exceeding or dropping below certain values. If the output exceeds a value furnished
by DAC2, previously filed in FW 190, then the output of the difference amplifier and the input chan-
nel AV1 are read in at the ADC and stored in the flag area. Depending on the signal status of the
binary input B12, either KF = +800 (status "O") or KF = +1000 (status "l") is active at DAC1. If the
respective value drops too low, a voltage of 5.85 V is output at DAC3. The module address is given
as 176; parameterization is for falling edge.
On the module 432–4, the presetting must be set according to the operating instructions.
Interrupt Processing
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