7.5.1 Address Assignment
For read and write operations the 1P 243 requires an 8–byte address area. These eight bytes are
assigned as follows:
Starting address + 1
Starting address + 2
Starting address + 3
Starting address + 4
L
address
+ 5
—
Starting address + 6
L
Starting addresc
Starting address + 1
Starting address + 2
Starting address + 3
address + 4
address + 5
address + 6
address + 7
Attention:
Although the four bytes ADR O to 3 are not set for READ and no READY is generated,
no input module maybe addressed in this area, as the data bus driver of the module
is "turned on" in this area also.
READ
– – – – – – – – (READY-Delay)
o
1
–
–
– -
– –
2
–
–
– – – – – –
3
–
–
– -
– – – –
4
7
6
5
4
3 2
c
1
D
6 I
7 26 75 24
2'1 2'?
8
2
29
3
2
2
2
2'
— —
7
—
WRITE
s x x x x
2
1
5
s x x x x
2
3
,2
I
7
2
1261251 f I ZJL
5
7
6
5 4
3
x x
x x
x
6
LOG 8TR x x
x
7
Programming Instructions
(READY-Delay)
–
–
(READY-Delay)
(READY-Delay)
DIGITAL INPUT
0
1
COMPARATORS
B A
LOW–BYTE ADC
HIGH–BYTE DAC1
2 9 28
LOW–BYTE
2 ' 20
HIGH–BYTE
7 – 19
I