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Computer I/O address
(hexadecimal)
HML0 + 39
HML0 + 3A
HML0 + 3B
HML0 + 3C
HML0 + 3D
HML0 + 3E
HML0 + 3F
In case [Bank change-over response register = 00H] (Initial value) (S-LINK V I/O data)
● This is an area to read out input data and write in output data of S-LINK V I/O units.
In case of input data, "0: Input OFF" or "1: Input ON" can be read out for each bit.
In case of output data, write in "0: Output OFF" or "1: Output ON" in each bit.
Notes: 1) Output is maintained until overwritten with the next output data.
2) In case output data is written into a unit address which has been set as an input, the written data is
ignored and input data is set after 1 or 2 refresh times.
In case [Bank change-over response register = 01H] (S-LINK V I/O unit connection address)
● The first address of S-LINK V I/O units connected on the S-LINK V system main cable is
shown.
When each bit is "1," the S-LINK V I/O unit having the set address is connected on the main
cable.
Note: When an S-LINK V I/O unit has several I/Os, only the bit corresponding to the first address of that unit
is "1."
In case [Bank change-over response register = 02H] (Error 3 occurred address)
● When Error 3 occurs, the first address of the affected S-LINK V I/O unit is indicated.
When each bit is "1," the S-LINK V I/O unit connected to the address is disconnected or in error.
In case [Bank change-over response register = 03H] (Error 4 occurred address)
● When Error 4 occurs, the first address of the affected S-LINK V I/O unit is indicated.
When each bit is "1," an unidentified unit exists at the S-LINK V I/O unit having the allocated
address.
In case [Bank change-over response register = 04H] (Error 5 occurred address)
● When Error 5 occurs, the first address of the affected S-LINK V I/O unit is indicated.
When each bit is "1," output of S-LINK V output unit of the address short-circuits or the I/O driv-
ing power breaks down.
In case [Bank change-over response register = 05H] (Occupied address)
● The addresses allocated to the recognized S-LINK V units are indicated.
When each bit is "1," S-LINK V I/O unit is connected to the address.
In case [Bank change-over response register = 06H] (I/O state)
● Shows whether the recognized address of S-LINK V system is used in input or output.
The address is used as "Input" if the address corresponding to each bit is "1," and as "Output" if
the address is "0." (Unused address is "0.")
In case [Bank change-over response register = 07H] (Interruption setting)
● Shows the address of S-LINK V I/O unit that is set to interruption setting.
The interruption setting is conducted by 1 point unit.
When each bit is "1," the signal of the corresponding address of S-LINK V input unit changes,
interruption occurs. (In case the resource that generates interruption is set)
8
bit 7
bit 6
bit 5
463
462
461
471
470
469
479
478
477
487
486
485
495
494
493
503
502
501
511
510
509
S-LINK V address
bit 4
bit 3
bit 2
460
459
468
467
476
475
484
483
492
491
500
499
508
507
bit 1
bit 0
458
457
456
466
465
464
474
473
472
482
481
480
490
489
488
498
497
496
506
505
504
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