Automatic Vxi Slave Cycle Retry; A24/A32 Write Posting; Vxi Transfer Limit - National Instruments VXI Series Getting Started

Chapter 3 VXI Configuration Utility
The VXIpc 800 has a limit on the number of automatic retries it will perform on any
Note
one cycle. If the limit is exceeded and the VXIpc 800 receives another retry, it will pass a
retry or BERR (depending on whether the Enable Auto Retry protocol option is active or
disabled) to the VXIbus even though the Automatically retry VXI slave cycles option is
active.
VXIpc Controller for VxWorks

Automatic VXI Slave Cycle Retry

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This option is not available in the VXIpc 700 Series.
The VXIpc 800 Series has an automatic retry feature for cycles that map
from the VXIbus to the PCI bus on the VXIpc 800. You can use the
Automatically retry VXI slave cycles field to enable or disable this option.
By default this option is enabled on the VXIpc 800 Series and disabled on
the VXIpc 700 Series.
Normally, when a cycle maps from the VXIbus to the PCI bus, any retry
response received on the PCI bus is passed to the VXIbus. When this
feature is enabled, the VXIpc 800 automatically retries any PCI cycle when
the PCI host responds to a cycle with a retry. The VXIpc 800 automatically
continues to retry the PCI cycle until it receives either a Disconnect or
Target-Abort response, which it then passes to the VXIbus. This behavior
is the default because many VXIbus masters do not support VXI retries.
If the VXIbus master does support retries, you may find it beneficial to
disable this feature. With this feature disabled, you can lower the value of
the VXI Bus Timeout because there is no delay from the inward cycles
being retried.

A24/A32 Write Posting

The VXIpc controller can increase performance with its capability to
post write cycles from the VXIbus. You should post write cycles only to
addresses that cannot return a BERR signal, because the BERR will not be
reported to the originating master. By default, this option is enabled.
The A24/A32 write posting field affects write cycles to the VXIpc
controller via its requested memory space from the VXIbus. When this
option is enabled, the VXIpc controller completes a VXIbus write cycle
before writing the data from the cycle to the local destination on the VXIpc.

VXI Transfer Limit

You can use the Transfer Limit field to set how many data transfers the
VXIpc controller will perform on the VXIbus before releasing it to another
master device that is requesting use of the bus.
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