SIM Tech SIMCom SIM5360 Hardware Design page 44

Table 26: Timing parameters
Parameter Description
T(auxsync) AUX_PCM_SYNC cycle time
T(auxsynch) AUX_PCM_SYNC high time
T(auxsyncl) AUX_PCM_SYNC low time
T(auxclk)* AUX_PCM_CLK cycle time
T(auxclkh) AUX_PCM_CLK high time
T(auxclkl) AUX_PCM_CLK low time
AUX_PCM_SYNC setup time high before
T(suauxsync)
falling edge of PCM_CLK
AUX_PCM SYNC hold time after falling edge
T(hauxsync)
of PCM_CLK
AUX_PCM_DIN setup time before falling
T(suauxdin)
edge of AUX_PCM_CLK
AUX_PCM_DIN hold time after falling edge
T(hauxdin)
of AUX_PCM_CLK
Delay
T(pauxdout)
AUX_PCM_DOUT valid
*Note: T(auxclk) = 1/(128 KHz).
Primary PCM (2048 KHz PCM clock)
SIM5360 also supports 2.048 MHz PCM data and sync timing for υ -law codec. This is called the primary
PCM interface. User can use AT command to take the mode you want as discussed above.
SIM5360_Hardware Design_V1.01
from AUX_PCM_CLK
Figure 31: Synchrony timing
Smart Machine Smart Decision
Min
–
62.4
62.4
-
3.8
3.8
1.95
1.95
70
20
rising to
–
44
Typ Max Unit
125 - μs
62.5 - μs
62.5 - μs
7.8 – μs
3.9 – μs
3.9 – μs
– – μs
– – μs
– – ns
– – ns
– 50 ns
2013-11-22