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Linear Technology LTC4110 Manual

Battery backup system manager
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FEATURES
n
Complete Backup Battery Manager for Li-Ion/
Polymer, Lead Acid, NiMH/NiCd Batteries and
Super Capacitors
n
Charge and Discharge Battery with Voltages Above
and Below the Input Supply Voltage
n
"No Heat" Battery Calibration Discharge Using
System Load
n
Automatic Battery Backup with Input Supply
Removal Using PowerPath™ Control
n
Standalone for Li-Ion/Polymer, SLA, and Supercaps
2
n
Optional SMBus/I
C Support Allows Battery
Capacity Calibration Operation with Host
n
Over- and Under-Battery Voltage Protection
n
Adjustable Battery Float Voltage
n
Precision Charge Voltage ±0.5%
n
Programmable Charge/Calibration Current Up to
3A with ±3% Accuracy
n
Optional Temperature Qualifi ed Charging
n
Wide Backup Battery Supply Range: 2.7V to 19V
n
Wide Input Supply Range: 4.5V to 19V
n
38-Lead (5mm × 7mm) QFN Package
APPLICATIONS
n
Backup Battery Systems
n
Server Memory Backup
n
Medical Equipment
n
High Reliability Systems
TYPICAL APPLICATION
Battery Backup System Manager
SYSTEM LOAD
BACKUP LOAD (DCOUT)
DCIN
0V
OFF
INID
UVLO
LTC4110
DCDIV
SET POINT
CURRENT FLOW
ON
ON
BATTERY
BATID
CHGFET
DCHFET
4110 F01
Battery Backup
System Manager
DESCRIPTION
The LTC
®
4110 is a complete single chip, high effi ciency,
fl yback battery charge and discharge manager with auto-
matic switchover between the input supply and the backup
battery or super capacitor. The IC provides four modes of
operation: battery backup, battery charge, battery calibra-
tion and shutdown. Battery backup and battery charge are
automatic standalone modes, while the optional calibration
mode requires a CPU host to communicate over an SMBus.
During calibration the fl yback charger is used in reverse
to discharge the battery with a programmable constant
current into the system load eliminating heat generation.
Three status outputs can be individually reconfi gured over
the SMBus to become GPIOs. User programmable over-
discharge protection is provided. The SHDN pin isolates
the battery to support shipping the product with a charged
battery installed.
Multiple LTC4110s can be combined to form a redundant
battery backup system or increase the number of battery
packs to achieve longer backup run times.
The LTC4110 is available in a low profi le (0.75mm), 38-pin
5mm × 7mm QFN package. The QFN features an exposed
metal die mount pad for optimum thermal performance.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PowerPath
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
Server Backup System (In Backup Mode)
LTC4110
BATTERY
BACKUP
SYSTEM
MANAGER
HOST CPU
LTC4110
SYSTEM LOAD
(DC/DC, ETC.)
BACKUP LOAD
(MEMORY, ETC.)
CURRENT FLOW
BATTERY
2
I
C BUS
4110 TA01b
4110fb
1

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Summary of Contents for Linear Technology LTC4110

  • Page 1 APPLICATIONS L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the property of their Backup Battery Systems respective owners.

  • Page 2: Absolute Maximum Ratings

    LTC4110 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW DCIN, BAT, DCOUT, DCDIV, SHDN to GND ............–0.3V to 20V Input Voltage (CLP , CLN) ....–0.3V to DCIN + 0.3V 38 37 36 35 34 33 32 Input Voltage (CSP , CSN) ....–0.3V to BAT + 0.3V...

  • Page 3: Electrical Characteristics

    LTC4110 ELECTRICAL CHARACTERISTICS denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. Unless otherwise specifi ed, V = 12V, V = 8.4V, DCIN DCOUT DCDIV GND = SGND = CLP = CLN = SHDN = 0V and R = 49.9k.
  • Page 4 LTC4110 ELECTRICAL CHARACTERISTICS denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. Unless otherwise specifi ed, V = 12V, V = 8.4V, DCIN DCOUT DCDIV GND = SGND = CLP = CLN = SHDN = 0V and R = 49.9k.
  • Page 5 LTC4110 ELECTRICAL CHARACTERISTICS denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. Unless otherwise specifi ed, V = 12V, V = 8.4V, DCIN DCOUT DCDIV GND = SGND = CLP = CLN = SHDN = 0V and R = 49.9k.
  • Page 6 Slave Clocking in Data Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: The LTC4110 is idle with no application load. It is not charging may cause permanent damage to the device. Exposure to any Absolute or calibrating the battery and is not in backup or shutdown mode. The Maximum Rating condition for extended periods may affect device internal clock is running and the SMBus is functional.

  • Page 7: Typical Performance Characteristics

    LTC4110 TYPICAL PERFORMANCE CHARACTERISTICS Output Charging Characteristics Typical CHGFET and DCHFET Showing Constant Current and Supply Current vs DCIN Voltage in Waveforms Constant Voltage Operation Idle Mode 1200 1000 5V/DIV PRE-CHARGE 4110 G01 500ns/DIV = 12V = 12V (NiMH) DCIN (V)

  • Page 8: Pin Functions

    DCIN supply is present. Normally tied to ground. SELA (Pin 12): SMBus Address Selection Input. Selects Internal pin pull-up current. the LTC4110 SMBus address to facilitate redundant backup systems when standard batteries are used. Connect to SDA (Pin 7): SMBus Bidirectional Data Signal. Connect...
  • Page 9 LTC4110 PIN FUNCTIONS ACPb (Pin 13): AC Present Status Digital Output. Open- THB (Pin 21): SafetySignal Force/Sense Pin to Smart Battery and Sense Pin to Lead Acid Battery Thermistor. Drain N-MOSFET output is asserted low when the main See description of operation for more detail. The maxi-...
  • Page 10 LTC4110 PIN FUNCTIONS BAT (Pin 31): Battery Voltage Sense Input. This pin is used BATID (Pin 35): Drives the Gate of the Battery P-MOSFET to monitor the battery and control charging voltage through Ideal Diode. Controls low loss ideal diode between the an internal resistor divider connected to this pin that is battery and backup load when in backup mode.

  • Page 11: Block Diagram

    LTC4110 BLOCK DIAGRAM 37 DCOUT 36 NC SUPPLY INPUT BATTERY INID PowerPath CONTROLLER 35 BATID DCIN 31 BAT 27 CSN NUMBER 26 CSP OF CELLS PRECISION REGULATOR VOLTAGE DIVIDER CHG/DCH SWITCH CURRENT SELECTION 22 I CURRENT 24 I SWITCH 1.220...

  • Page 12: Operation

    Applications. converter permits charging of batteries who’s termination It is important to know that the LTC4110 uses the TYPE voltage can be greater than the main supply voltage, while pin to learn what type of battery it will be working with.

  • Page 13: Battery Backup Mode

    LTC4110 OPERATION and ranges. It should be noted that even if the LTC4110 MOSFET is suffi ciently sized. If the voltage input falls and TYPE pin is not set to a smart battery mode, any SMBus results in a forward voltage below 20mV, then the ideal commands sent by a host or a smart battery are still diode will begin turning off at a slow rate.
  • Page 14 However it is not recommended to use a standard stays below the bulk charge threshold (V ) 25% of the battery with a LTC4110 confi gured for smart battery mode programmed bulk charge time, the battery may be defective operation. You can shorten battery life, damage or destroy and the charge sequence will be terminated immediately.
  • Page 15 LTC4110 OPERATION 7, 12, 13 STOPPED CHARGE RESET (BATTERY OVP) STATE 11 (BATTERY NEEDS RECHARGE) RESUME 5 (PRE-CONDITIONING FAULT) PRE-CONDITIONING STOP CHARGE CHARGE CHARGE CHARGE STATE STATE 6 (BULK TIME FAULT) 4 (BATTERY FULL) STOP BULK TOP-OFF CHARGE CHARGE CHARGE...
  • Page 16 TYPE pin to the V pin. bulk charge time has elapsed during bulk charge. When The LTC4110 only implements a subset of smart battery the current drops to approximately 20% of the full-scale charger commands; the actual charging algorithm is...
  • Page 17 LTC4110 OPERATION WAKE UP STOPPED CHARGE RESET CHARGE (BATTERY OVP) STATE 4, 7, 13, 14 RESUME PRE-CONDITIONING BULK CHARGE CURRENT CHARGE CHARGE STATE STATE (BATTERY FULL) 5 (BAD BATTERY) 6 (BATTERY RECHARGE REQUEST) (OVERTEMPERATURE) 4110 F04 Figure 4. Smart Battery Charge State Diagram (Does Not Include Calibration)
  • Page 18 SMBus precondition- TIMEOUT machine will go to the reset state. ing charge state. • The LTC4110 will leave the wake-up charge state and • The SafetySignal must be RES_COLD, RES_IDEAL, or go into the SMBus preconditioning charge state if the RES_UR.
  • Page 19 LTC4110 enters the SMBus OFF state. • The AC power is no longer present (DCDIV < V DCIN < UVLO). The LTC4110 enters the reset state. • The SafetySignal is registering RES_OR. Charge is stopped and the LTC4110 enters the reset state.
  • Page 20 fl oat voltage the BATTERY CALIBRATION MODE charger begins its fl oat charge. While in fl oat, the charge Figure 6 shows the LTC4110 in battery calibration mode and current diminishes as the battery accepts charge. Float the corresponding PowerPath enabled. During calibration, voltage temperature compensation and temperature fault the host CPU can calibrate a gas gauge or verify the battery’s...
  • Page 21 LTC4110 OPERATION STOPPED CHARGE RESET (BATTERY OVP) STATE RESUME CHARGE CHARGE CHARGE STOP STATE STATE 4110 F05 STOP (OVERTEMPERATURE) Figure 5. SLA Charge State Diagram (Does Not Include Calibration) Logic Event (T = True, F = False) [Notes] Notes and/or Actions (T = True, F = False) RES_OR = F &...

  • Page 22: Shut Down Mode

    Calibration can start only if the CAL_FLT bit in the If the calibration cycle fails due to loss of the main power BBuStatus() register is clear. Once the LTC4110 is in cali- source a fault condition results that sets the CAL_FLT bration state, the following events will stop calibration: register bit and backup mode is entered.
  • Page 23 V pin voltages remain. and DCIN above UVLO. Micropower shutdown state will not be entered, but the LTC4110 will be idle and MICROPOWER SHUTDOWN STATE not able to enter charge or calibration modes. If SHDN is switched low then normal operation will resume.

  • Page 24: Pwm Operation

    ACPb, GPIO1, GPIO2 and GPIO3 are a high impedance nected to the CSP and CSN pins and then amplifi ed by a and the LTC4110 is put into a micropower state. While ratio of R ). This amplifi ed voltage is...
  • Page 25 SafetySignal Note: The under range detection scheme is a very important feature of the value to provide the appropriate adjustment in threshold to LTC4110. The R divider trip point of 0.307 • 4.75V = 1.46V SafetySignal add hysteresis.
  • Page 26 However, if the All GPIO pins operate as digital inputs at all times regard- LTC4110 is set up in no host mode, CAL_COMPLETEb as a less of the pin settings with pin state reported on the status signal is not considered usable since it is assumed GPIO_n_IN bits in the BBuStatus() register.

  • Page 27: Smbus Interface

    SMBus interface to a complete description of the bus protocol requirements, an initial state at any time. The LTC4110 command set is reference “The I C-Bus and How to Use It, V1.0” by Phil- interpreted by the SMBus interface and passed onto the ®...
  • Page 28 SMBus is hung. TYPE pin the SELA pin must be connected to GND to select The LTC4110 does not support or respond to the following address 12h. Note: Although there are only 7 address bits SMBus V1.1 timing specifi cations:...
  • Page 29 AlarmWarning() – Write Only. The Smart Battery, acting as a bus master device, sends the AlarmWarning() message to the LTC4110 to notify it that one or more alarm conditions exist. Alarm indications are encoded as bit fi elds in the battery’s status register, which is then sent to the LTC4110 by this function.
  • Page 30 TERMINATE_DISCHARGE_ALARM Set to one indicates battery requesting discharge termination. Smart battery only. Setting this bit will only stop a calibration process (default = zero). BBuStatus() – Read Only. The SMBus host uses this command to read the LTC4110’s status bits. CAL_ON Set to one indicates calibration in progress to discharge the battery.
  • Page 31 (default = cleared to zero-no reset) POR_RESET Resets LTC4110 to power-on default values. Setting the bit to a one will activate POR_RESET. POR_RESET performs a total chip wide reset like the SHDN pin function without the chip actually shutting down. This includes clearing any bits in registers.
  • Page 32 LTC4110 OPERATION Table 7. Summary of Supported SMBus Functions SMBus Command Data Function Access Address Code Type D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 ChargerStatus( ) 7’b0001_ 8'h13 Status Return Read...

  • Page 33: Applications Information

    LTC4110 APPLICATIONS INFORMATION The fi rst confi guration option to set for the LTC4110 is the based on the desired cap voltage and series cell count. type and cell count of the battery you wish to use. Pins Other per cell voltages can be obtained by adjusting the TYPE and SELC are use to set this confi...
  • Page 34 LTC4110 APPLICATIONS INFORMATION SOFT-START CALIBRATION MODE BACK-DRIVE CURRENT PROTECTION The LTC4110 is soft-started with the 0.1μF capacitor on the I pin. On start-up, the I pin voltage will rise quickly A resistor between CLP and CLN programs the minimum to 0.1V, then ramp up at a rate set by the internal 24μA supply forward current, this feature prevent the LTC4110 pull-up current and the external capacitor.
  • Page 35 SNS(FET) resistor. See the PCB Layout section for a reasonable no rent in both Charge and Calibration modes. The LTC4110’s cost Kelvin sensing layout that permits the use of less pin serves two functions. First is to regulate the SENSE expensive standard two terminal sense resistors.
  • Page 36 + AC) at any time in any mode. It does not monitor the • The transformer turns ratio will approximately reduce batteries’ DC current. The LTC4110 uses leading edge the maximum available DC current ratio between I blanking to mask out noise to make the application of this to I by a factor of 1/N.
  • Page 37 β = exponential temperature coeffi cient of resistance Depending on the battery chemistry chosen by the TYPE The LTC4110 is designed to work best with a 5% 10k NTC pin, a charge termination voltage or a fl oat voltage will be thermistor with a β...
  • Page 38 LTC4110 APPLICATIONS INFORMATION = resistor between fl yback transformer and SNS(BAT) battery CSP1 CSP2 (1 – k3) • R VREF CSN1 CSN2 = resistor connected between I pin and GND k3 • R ICHG VREF – = resistor connected between I...
  • Page 39 • . 2 35 = Any regulated DC voltage available in the system CUTOFF such as SMBus pull up, LED supply or LTC4110’s V voltage, must be higher than 1.7V. R3 = resistor connected • • NiMH NiCD between V and DCDIV.
  • Page 40 LTC4110 APPLICATIONS INFORMATION where If the TYPE pin is set for SLA/LEAD ACID or any nickel based smart battery, the TIMER pin is not used. You can = adjusted cutoff threshold voltage CUTOFF ground the TIMER pin. Furthermore, if there is no need...
  • Page 41 I pin to the current sense resistor SENSE When LTC4110 is in IDLE mode (i.e., not in charge, calibra- ) thus develops a ramping voltage drop. From SNS(FET) tion or backup mode), there will be a typical 30μA current...

  • Page 42: Component Selection

    The LTC4110 uses two low side N-channel switching MOSFETs in its fl yback converter. These MOSFETs have The LTC4110 uses up to three sense resistors—one of dual roles. An any given time, only one MOSFET is the them optional. In general, current sense resistors should primary switch while the other acts as a synchronous recti- have a low temperature coeffi...
  • Page 43 MOSFET power above into I to fi nd each FET’s power dissipation for dissipation. Keep in mind that the LTC4110 will regulate the given mode. the forward voltage drop across the MOSFETs at 20mV ) if R is low enough.
  • Page 44 Switching transition time is another consideration. When Turns ratio affects the duty factor of the power converter the LTC4110 senses a need to switch any PowerPath which impacts current and voltage stress on the power MOSFETs on or off time delays are encountered. MOSFETs...
  • Page 45 INPUT AND OUTPUT CAPACITORS Similar techniques may also be applied to minimize EMI from the input leads. The LTC4110 uses a synchronous fl yback regulator to provide high battery charging current. A chip ceramic Diodes capacitor is recommended for both the input and output...
  • Page 46 DCIN TO BATTERY TRANSITION CHATTER REMOVAL If a dual backup system consisting of two LTC4110s The LTC4110 is designed to automatically switch the bat- each with its own backup battery is needed and a SMBus tery to the output load when DCIN is lost. Under certain...

  • Page 47: Pcb Layout Considerations

    LTC4110 APPLICATIONS INFORMATION PCB LAYOUT CONSIDERATIONS Other Recommendations For maximum effi ciency, the switch node rise and fall 6. Optionally use vias to connect power supply sources times should be minimized. To prevent magnetic and positive and negative (ground) connections from electrical fi...

  • Page 48: Typical Applications

    LTC4110 TYPICAL APPLICATIONS Battery Backup System Manager Controlling a Six-Series Cell SLA Battery with Temperature Compensation TO SYSTEM LOAD 0.02Ω INPUT SUPPLY IDEAL DIODE INPUT TO BACKUP (12V) LOAD 0.1μF 0.1μF 8.66k BATTERY IDEAL 1.21k DIODE 20μF INID VERY LOW ESR...
  • Page 49 LTC4110 TYPICAL APPLICATIONS Battery Backup System Manager Controlling a Nine-Series Cell NiMH Battery with Calibration Managed by Host Processor TO SYSTEM LOAD 0.02Ω INPUT SUPPLY IDEAL DIODE INPUT TO BACKUP (12V) LOAD 0.1μF 0.1μF 8.66k BATTERY IDEAL 1.21k DIODE INID 20μF...
  • Page 50 LTC4110 TYPICAL APPLICATIONS 4110fb...

  • Page 51: Package Description

    Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

  • Page 52: Typical Application

    Dual, Low Loss PowerPath Controllers Drives Large PFETs, Low Loss Replacement for Power Supply ORing Diodes, LTC4416-1 Operation to 36V, Programmable Autonomous Switching ThinSot is a Trademark of Linear Technology Corporation. 4110fb LT 0409 REV B • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417...

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