Status Register (Stat) - National Instruments GPIB-LPT User Manual

Section Five

Status Register (STAT)

PC Address: Base I/O Address + 1 (hex)
Attributes: Read Only
7 6
BUSY* ACK*
Printer status is stored at this address to be read by the microprocessor.
Bit Mnemonic
7r BUSY*
6r ACK*
5r PE
4r SLCT
© National Instruments Corporation
5 4
PE SLCT ERROR*
Description
Device is Busy Bit
This signal is active when the printer is busy and cannot accept
data or when the GPIB printer is being listen-addressed and is
asserting the Not Ready For Data (NRFD) GPIB handshake
line.
Acknowledge Bit
This bit emulates the ACK* signal generated by the external
parallel port device, indicating that the device has received a
character. It is a 5 µsec (minimum) pulse triggered when the
Not Data Accepted (NDAC) GPIB handshake line is unasserted
by the external GPIB device.
Paper Error Bit
This bit indicates to the parallel port adapter that a paper error
has occurred (a logical 1 means end of paper has been detected).
The GPIB-LPT can be configured to use this bit to monitor the
current state of the GPIB SRQ line. If the GPIB-LPT switch is
set to enable the Service Request (SRQ) option, PE is a logical 1
when the SRQ is asserted.
Select Bit
This bit indicates to the parallel port adapter that the printer is
selected (a logical 1 means the printer is selected). The GPIB-
LPT automatically addresses the external GPIB device to listen
when the first data byte is sent. The GPIB-LPT asserts the
SLCT bit (makes it a logical 1) whenever the GPIB line
Attention (ATN) is not being asserted; the SLCT bit is a logical
0 when ATN is being asserted (when the printer is being
listen-addressed).
5-3
3 2
X
Programming the GPIB-LPT
1
0 R
X X
GPIB-LPT User Manual