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DEMO MANUAL DC1624A
perForMAnce sUMMArY
SYMBOL
PARAMETER
I
External N-Channel Gate Pull-Up Current
HGATE(UP)
I
External N-Channel Gate Pull-Down Current
HGATE(DN)
I
External N-Channel Gate Fast Pull-Down
HGATE(FPD)
Current
Input/Output Pin
V
ON
ON(TH)
V
ON
ON(RESET)
V
EN
EN(TH)
V
TMR
TMR(TH)
I
TMR
TMR(UP)
I
TMR
TMR(DN)
I
TMR
TMR(RATIO)
qUick stArt proceDUre
The LTC4225 functions as an ideal diode with inrush cur-
rent limiting and overcurrent protection by controlling
two external back-to-back N-channel MOSFETs in a power
path. The LTC4225 has two ideal diode and two Hot Swap
controllers. Each ideal diode MOSFET is intended to oper-
ate with a defined Hot Swap MOSFET, because they are
tied by common on/off control, and ideal diode controller
sense voltage includes both MOSFETs and sense resistor
voltage drop. Therefore, LTC4225 provides independent
control for the two input supplies.
The LTC4225 gate drive amplifiers (DGATE
the voltage between the IN
DGATE
pins. The amplifier quickly pulls up the DGATE
N
pin, turning on the MOSFET (Q1 or Q3), for ideal diode
control when it senses a large forward voltage drop.
Pulling the ON pin high and EN pins low initiates a 100ms
debounce timing cycle. After 100ms, a 10µA current source
from the charge pump ramps up the HGATE
the Hot Swap MOSFET (Q2 or Q4) turns on, the inrush
current is limited to a set level set by an external sense
resistor placed between IN and SENSE pins.
2
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On Pin Threshold Voltage
N
Pin Fault Reset Threshold Voltage
N
Pin Threshold Voltage
N
Pin Threshold Voltage
N
Pin Pull-Up Current
N
Pin Pull-Down Current
N
Current Ratio I
I
N
TMR(DN)/
TMR(UP)
and OUT
pins and drive the
N
N
(T
= 25°C)
A
CONDITIONS
Gate Drive On, HGATE = 0V
Gate Drive Off, OUT = 12V, HGATE = OUT + 5V
Fast Turn-Off, OUT = 12V, HGATE = OUT + 5V
ON Rising
ON Falling
EN Rising
TMR Rising
TMR Falling
TMR = 1V, In Fault Mode
TMR = 2V, No Faults
An active current limit amplifier servos the gate of the
MOSFET to 65mV across the current sense resistor. In-
rush current can be further reduced, if desired, by adding
a capacitor from HGATE to GND. When the MOSFET's
gate overdrive (HGATE to OUT voltage) exceeds 4.2V, the
PWRGD pin pulls low.
When both MOSFETs (Q1 and Q2 or Q3 and Q4) are turned
on, the gate drive amplifier controls DGATE to servo the
forward voltage drop (V
and the back-to-back MOSFETs to 25mV. If the load current
,) monitor
causes more than 25mV of voltage drop, the gate voltage
N
rises to enhance the MOSFET used for ideal diode control.
For large output currents the MOSFET's gate is driven
fully on and the voltage drop is equal to the sum of the
I
• RD
LOAD
In the case of an input supply short circuit when the
MOSFETs are conducting, a large reverse current starts
pin. When
flowing from the load towards the input. The gate drive
N
amplifier detects this failure condition as soon as it ap-
pears and turns off the ideal diode MOSFET by pulling
down the DGATE pin.
MIN
TYP
7
10
150
300
100
200
1.21
1.235
0.55
0.6
1.185
1.235
1.198
1.235
0.15
0.2
75
100
1.4
2
1.4
2
- V
) across the sense resistor
IN
OUT
) of the two MOSFETs in series.
S(ON
MAX
UNITS
13
µA
500
µA
300
mA
1.26
V
0.63
V
1.284
V
1.272
V
0.25
V
125
µA
2.6
µA
2.7
%
dc1624af
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