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Texas Instruments TPS5124EVM-001 User Manual
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Texas Instruments TPS5124EVM-001 User Manual

Texas Instruments TPS5124EVM-001 User Manual

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User's Guide
Using the TPS5124EVM-001
User's Guide
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Summary of Contents for Texas Instruments TPS5124EVM-001

  • Page 1 User’s Guide Using the TPS5124EVM-001 User’s Guide...
  • Page 2 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
  • Page 3 EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2004, Texas Instruments Incorporated...

  • Page 4: Table Of Contents

    SLUU182 − March 2004 High-Performance Dual Synchronous Buck Conversion Using the TPS5124 Systems Power Contents Introduction ............... . . Features .

  • Page 5: Features

    SLUU182 − March 2004 Features This EVM is designed to operate from 12-V bus voltage. It generates two outputs, 3.3 V at 15 A and 1.5 V at 10 A. Table 1. TPS5124EVM−001 Performance Summary PARAMETER TEST CONDITIONS UNITS Input voltage range 12.0 15.0 Operating frequency...
  • Page 6 SLUU182 − March 2004 Figure 1. HPA053 TPS5124 Controller Schematic High-Performance Dual Synchronous Buck Conversion Using the TPS5124...
  • Page 7 SLUU182 − March 2004 Design Procedure Frequency Setting Many factors influence frequency selection. Higher switching frequency leads to smaller output inductor and capacitor, reducing the size of the converter. However, higher switching frequencies increase switching losses, and lower the converter’s efficiency. A frequency of 300 kHz is chosen for this design for reasonable efficiency and size.
  • Page 8 SLUU182 − March 2004 where • is the allowed overshoot voltage OUT2 • is the nominal operating voltage OUT1 For 6% overshoot, the required capacitance is about 370 µF. Four 100-µF, 6.3-V ceramic capacitors are used. Their ESR value is 2.0 mΩ each. Input Capacitors Due to the out of phase operation, the input current ripple is partially cancelled.
  • Page 9 SLUU182 − March 2004 4.4.1 Case One: D1, D2 < 0.5. The ripple current through the input capacitor is shown in Figure 2 and can be calculated using equation (6). incapRMS )D2@T D1@T dt ) dt ) dt ) OUT1 OUT2 )D2@T D1@T...
  • Page 10 SLUU182 − March 2004 Compensation Design The following compensation loop design uses Channel 1 as example, but a design for Channel 2 follows the same rules. TPS5124 uses voltage-mode control method. A Type III compensation network, formed by R1, R2, R4, C14, C12, and C23, is used to guarantee the stability. The L-C frequency of the power stage is around 5.4 kHz and the ESR zero is at 790 KHz due to the low ESR of the ceramic capacitors.
  • Page 11 SLUU182 − March 2004 Figure 4 shows the closed loop gain and phase. For Channel 1, the overall crossover frequency is approximately 30 kHz and the phase margin is 58°. For Channel 2, the crossover frequency is approximately 23 kHz and phase margin is 55°. Current Limiting The current limit in TPS5124 is set using an internal current source and an external resistor (R13 and R14).
  • Page 12 SLUU182 − March 2004 Timer Latch The TPS5124 includes fault latch function with a user adjustable timer to latch the MOSFET drivers in case of a fault condition. When either the OVP or UVP comparator detect a fault condition, the timer starts to charge C18, the external capacitor connected to the SCP pin. The circuit is designed so that for any value of C18, the undervoltage latch time t is about five UVPL...
  • Page 13 SLUU182 − March 2004 4.7.4 Disabling the Protection Function If it is necessary to disable the protection functions of the TPS5124 for troubleshooting or other purposes, the OCP, OVP and UVP circuits may be disabled. 4.7.4.1 Disabling Overcurrent Protection (OCP) Remove the current limit resistors R13 and R14 to disable the current limit function.

  • Page 14: Test Results/Performance Data

    SLUU182 − March 2004 Test Results Efficiency Curves The efficiency was tested under three different operation conditions. OVERALL EFFICIENCY OVERALL EFFICIENCY OUTPUT CURRENT OUTPUT CURRENT VOUT2 (1.5 V) Enabled Only VOUT1 (3.3 V) Enabled Only V IN = 6.5 V V IN = 6.5 V V IN = 12 V V IN = 12 V...
  • Page 15 SLUU182 − March 2004 OVERALL EFFICIENCY OUTPUT POWER Both Channels Enabled V IN = 6.5 V V IN = 15 V V IN = 12 V Output Power Over the Full Power Figure 8. Typical Operating Waveform Typical operating waveforms taken at V =12 V, I = 15 A and I =10 A is shown in...
  • Page 16 SLUU182 − March 2004 Output Ripple Voltage and Load Transient The output ripple is about 20 mV at 15 A on Channel 1 (3.3 V) output and 15 mV at 10 A P−P P−P on Channel 2 output as shown in Figure 11. Figure 12 shows the load transient response.
  • Page 17 SLUU182 − March 2004 Layout Guidelines Proper design and layout is crucial to the performance of the power supply. Here are some suggestions to the layout of TPS5124 design. • A four−layer PCB design is recommended for designs using the TPS5124. Use at least one layer dedicated to the PWRGND plane.

  • Page 18: Pcb Layout

    SLUU182 − March 2004 • LH and LL should not be routed near the control pin area (e.g. INV, FB, REF, etc.). Output voltage • The output voltage sensing trace should be isolated by either ground plane. • The output voltage sensing trace should not be placed under the inductors on the same layer.
  • Page 19 SLUU182 − March 2004 Figure 15. Top Side Figure 16. Internal 1 High-Performance Dual Synchronous Buck Conversion Using the TPS5124...
  • Page 20 SLUU182 − March 2004 Figure 17. Internal 2 Figure 18. Bottom Side High-Performance Dual Synchronous Buck Conversion Using the TPS5124...

  • Page 21: List Of Materials

    SLUU182 − March 2004 List of Materials Table 2. List of Materials REFERENCE DESCRIPTION SIZE PART NUMBER DESIGNATOR Capacitor, ceramic, 2.2 µF, 50 V, X7R, 10% C1,C2, C3 1210 C12, C22 Capacitor, ceramic, 5600 pF, 50 V, X7R, 10% Capacitor, ceramic, 10 µF, 10 V, X5R, 10% 1210 Murata GRM32ER61A106KC01L...
  • Page 22 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...
  • Page 23 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments TPS5124EVM...