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C.17
SM 421; DI 32 x DC 24 V, 6ES7 421–1BL01–0AB0
The diagram below shows the connection of two redundant encoders to two
SM 421; D1 32 x 24 V. The encoders are connected to channel 0.
Figure C-15 Example of an interconnection with SM 421; DI 32 x 24 V
CPU 410-5H Process Automation/CPU 410 SMART
System Manual, 10/2013, A5E32631667-AA
Connection examples for redundant I/Os
C.17 SM 421; DI 32 x DC 24 V, 6ES7 421–1BL01–0AB0
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