syslogic IPC/NETIPCFW-1A User Documentation page 28

IPC/NETIPCFW-1A: User Documentation
DOC/NETIPCFW-E; V3.0
Code BIOS POST Progress
15H testing 8254 T2, for spkr, part B
16H testing 8254 T1, for refresh
17H testing 8254 T0, for 18.2Hz
18H starting memory refresh
19H testing memory refresh
1aH testing 15usec refresh ON/OFF time
1bH testing base 64KB memory
1cH testing data lines
20H testing address lines
21H testing parity (toggling)
22H base 64KB mem read/write test
23H system init before vector table init
24H init vector table
25H reading 8042 for turbo switch setting
26H initializing turbo data
27H any init after vector table init is next
28H setting monochrome mode
29H setting color mode
2aH toggle parity before optional video ROM test
2bH init before video ROM check
2cH control passed to video ROM
2dH video ROM returned control
2eH checking for EGA/VGA adapter found
2fH no EGA/VGA found, r/w test of video memory
30H looking for video retrace signal
31H retrace failed, checking alt. display
32H alt found, checking video retrace signal
33H compare switches w/actual adapter type
34H setting display mode
35H check ROM BIOS data area at seg 40h
36H setting cursor for power-on msg
37H displaying power-on message
38H save cursor position
39H display BIOS ident. string
3aH display "Hit <DEL> to ..." msg
40H preparing vm test. vrfy from display memory
41H preparing descriptor tables
42H enter virtual mode for memory test
43H enable ints for diagnostics mode
44H init data for checking wraparound at 0:0
45H checking for wrap, find total memory size
46H write extended memory test patterns
47H write conventional memory test patterns
48H finding low memory size from patterns
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