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Pin Description
Pin No.
Pin Name
1
VSS
2
BCK
3
AOUT
4
DOUT
5
MBOV
6
IPF
7
SBOK
8
CLCK
9
VDD
10
VSS
11
DATA
12
SFSY
13
SBSY
14
SPCK
15
SPDA
16
COFS
17
MONIT
18
VDD
19
TESIO0
20
P2VREF
21
SPDO
22
PDOS
23
PDO
24
TMAXS
25
TMAX
26
LPFN
27
LPFO
28
PVREF
29
VCOREF
30
VCOF
31
AVSS
I/O
-
Digital GND
O
Bit Clock (1.4122MHz) Output
O
Audio data output
O
Digital output
O
Buffer Memory over signal output
When over is" "
H
O
Compensated output
IPF outputs "H" when AOUT output has a symbol
which can't correct the error in the error correction mode.
O
CRCC Judgement result output of the Subcode Q data
" "
H is when judgement result is OK
I/O Clock input/output for reading subcode P~W data
Selectable to command bit
-
Digital Power VDD
-
Digital GND
O
Sub Code P~W data output
O
Playback Frame sync signal output
O
Sub code Block sync output
S1 is " "
H when the subcode sync output
O
Clock (176.4KHz) output for reading Processor status signal
O
Processor status signal output
O
Error correction Frame clock (7.35kHz) output
O
LSI internal signal Monitor port
Be able to monitor the clock for the DSP internal flag or PLL by the µ-COM Command
-
Digital power VDD
I
Test input port
Normally, fixed " "
L
-
2V
(4.2V) for PLL Block
REF
O
VCO Center Frequency shift port
O
Phase differential signal output between EFM and PLCK signal
(Used in x 8 Operation mode)
O
Phase differential signal output between EFM and PLCK signal
O
Select to Command Bit TMPS
O
TMAX detecting output
T
T
2
T
T
1
T
T
T
1
2
I
Inverted input of LPF AMP
O
Output of LPF AMP
-
V
for PLL Block
REF
I
VCO Center Frequency reference level
Normally, fixed "PVREF"
O
VCO Filter
-
Analog GND
Description
TMAX output
"P2VREF "
"VSS "
"HIZ "
Remark
3 state out
(P2VREF, PVREF, VSS)
3 state out
(P2VREF, HiZ, VSS)
Analog input
Analog output
Analog output
27
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