Infineon SPI DMA 1 Manual page 3

Spi data communication via dma, aurix tc2xx microcontroller training

Introduction

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The Queued Synchronous Peripheral Interface (QSPI) enables any

synchronous serial communication with external devices based on the

standardized SPI-bus signals: clock, data-in, data-out and slave select.

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The QSPI works in full duplex mode either as Master or Slave with up to

50 Mbit/s.

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The DMA module channels can be configured to transfer data from/to

QSPI FIFOs to/from internal RAM Memory without any CPU intervention.

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This example is based on the Infineon Low Level Drivers to demonstrate

SPI Master Slave Communication with minimum CPU intervention.

2020-01-17