Reset Control; Ios - Digi ConnectCore 8X Hardware Reference Manual

The ConnectCore 8X System-on-module

Reset control

The MCA, in cooperation with the PMIC, controls the reset line of the i.MX 8X processor. The SYS_
RESET pin is the main reset input of the ConnectCore 8X module. This pin is a pseudo open-drain with
an internal pull up. Asserting the SYS_RESET line low sets the MCA into reset state, and it remains in
this state until the line is de-asserted.
During system initialization, the MCA performs the following actions:
Asserts the PMIC on/off line (SCU_PMIC_ON_REQ) low for a configurable time (0-255 ms with a
n
default value of 50ms). This powers the PMIC off, switching off all regulated outputs of the
PMIC. You can disable this power cycle by setting the timer to 0.
Asserts the PMIC on/off line high to power the system on.
n
Keeps the reset line of the CPU low for a configurable time.
n
Releases the reset line of the CPU to allow starting the execution of the firmware on the i.MX
n
8X processor.
Note The CPU reset line is also connected to the PMIC. The PMIC won't release this line until it
is switched on and the entire starting sequence is finished (a few ms after the latest regulator
is turned on). This means that even if the MCA releases the reset line before the PMIC is ready,
the CPU won't go out of reset.
The following time diagram represents the reset sequence. Default values are as follows:
tr : 50 ms
n
1
tr : 2 ms
n
2
See System power-up
the ConnectCore 8X.
Reset line internal connection

IOs

The ConnectCore 8X MCA provides up to 19 configurable IOs.
Because the general purpose IOs do not incorporate internal pull-ups or pull-downs, you may have to
add the components to the module carrier board.
The following table lists all available MCA IOs with their configurable capabilities:
ConnectCore® 8X System-on-Module Hardware Reference Manual
sequence for more information about the power-up sequence of
The Micro Controller Assist™ hardware
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