Kenwood TK-5400 Series Service Manual page 14

CIRCUIT DESCRIPTION / SEMICONDUCTOR DATA
7-7. DSP
The DSP circuit consists of a DSP (IC611), a codec
(IC608), and an A/D converter (IC609) and processes the
base band signal. The DSP (IC611) operates on an external
clock of 12.288MHz (the same as the CPU), the I/O section
operates at 3.3V and the core section operates at 2.5V. The
DSP carries out the following processes:
• C4FM modulation and demodulation
• Analog FM modulation and demodulation
• Vocoder (IMBE) processing between audio codec and
modulation/demodulation
• CAI processing, such as error correction encoding
• QT/DQT encoding/decoding
• DTMF encoding
• Compressor/expander processing
• Transmit/receive audio filtering processing
• VOX processing
• Microphone amplifier AGC processing
• Beep tone generation, audio mute processing
• Modulation level processing
8. Signaling Circuit
8-1. Encode (QT/DQT/DTMF)
Each signaling data signal of QT, DQT and DTMF is gen-
erated by the DSP circuit, superposed on a modulation sig-
nal and output from pin 16 of the codec IC (IC608).
The modulation balance of the QT/DQT signal is adjusted
by the D/A converter (IC605) and the resulting signal is
routed to the modulation input of the VCO (L702) and VCXO
(X201).
The DTMF deviation of the TX DTMF tone is adjusted by
the D/A converter (IC605) and the resulting signal is routed
to VCO and VCXO. The RX DTMF tone is output from pin 15
of the codec IC, passes through the receive audio signal sys-
tem, and is output from the speaker.
8-2. Decode (QT/DQT)
The audio signal is removed from the FM detection signal
sent to the DSP circuit and the resulting signal is decoded.
9. Compander Circuit
The term "compander" means compressor and ex-
pander. The compander reduces noise by utilizing a com-
pressor and an expander.
The TK-5400 contains DSP IC (IC611) to perform this op-
eration. The TK-5400 compander can be turned on or off
using the FPU.
1. PLL : SA7026DH (TX-RX Unit IC204)
1-1. Block Diagram
17
CLOCK
2-bit Shift 22-bit Shift
18
register register
DATA
19
Control
STROBE Address decoder
latch
Load signals
Latch
5
RFin+
6 Main divider
RFin–
Amp
SM
Latch
16
REFin+
Reference
15 2 2 2 2
divider
REFin–
SA
Amp Latch
12
AUXin AUX divider
2
TEST
4
GND GND
1-2. Pin Function
Pin No. Pin Name
1 LOCK Lock detect output
2 TEST Test (should be either grounded or
connected to V
3 V Digital supply
DD
4 GND Digital ground
5 RFin+ RF input to main divider
6 RFin– RF input to main divider
7 GND Charge pump ground
CP
8 PHP Main normal charge pump
9 PHI Main integral charge pump
10 GND Charge pump ground
CP
11 PHA Auxiliary charge pump output
12 AUXin Input to auxiliary divider
13 V Charge pump supply voltage
DDCP
14 R External resistor from this pin to ground
SET
sets the charge pump current
15 REFin– Reference input
16 REFin+ Reference input
17 CLOCK Programming bus clock input
18 DATA Programming bus data input
19 STROBE Programming bus enable input
20 PON Power down control
TK-5400
3
Pump
13
current
setting
14
Pump
bias
20
COMP
8
Phase
detector
9
1
Phase
11
detector
7,10
CP
Function
)
DD
V
DD
V
DDCP
R
SET
PON
PHP
PHI
LOCK
PHA
13