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Super X11SDD-8C/18C-F User's Manual
Mirror Mode
This feature allows memory to be mirrored between two channels, providing 100%
redundancy and consequently reducing the memory capacity by half. The options are
Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
UEFI ARM Mirror
Select Enable to support the UEFI-based address range mirroring with setup option.
The options are Disable and Enable.
Memory Rank Sparing
Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.
Correctable Error Threshold
Use this feature to specify the threshold value for correctable memory error logging,
which sets a limit on the maximum number of events that can be logged in the memory
error log at a given time. Select a value between 1-32776. The default setting is 7fff.
SDDC
Single device data correction (SDDC) organizes data in a single bundle (x4/x8 DRAM).
If any or all the bits become corrupted, corrections occur. The x4 condition is corrected
on all cases. The x8 condition is corrected only if the system is in Lockstep Mode. The
options are Disable and Enable.
ADDDC Sparing
Adaptive Double Device Data Correction (ADDDC) Sparing detects when the prede-
termined threshold for correctable errors is reached, copying the contents of the failing
DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The
options are Disable and Enable.
Patrol Scrub
Patrol Scrub is a process that allows the CPU to correct correctable memory errors
detected on a memory module and send the correction to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache
line every 16K cycles if there is no delay caused by internal processing. By using this
method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The
options are Disable and Enable.
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