2.2.2 External Memory Timing
This section describes the timing for the external memory bus when the R2812 is
operating at 150 Mhz. In addition a segment of 'C' code is provided to configure the
EMIF.
The following 'C' code segment will initialize the EMIF for 150 Mhz operation.
#define XINTCNF2 ( 0x13 )
#define XWRTRAIL(x)
#define XWRACTIVE(x)
#define XWRLEAD(x)
#define XRDTRAIL(x)
#define XRDACTIVE(x)
#define XRDLEAD(x)
#define USEREADY
#define ASYNCREADY (1<<15)
#define XTIMING6 (XWRTRAIL(2)
XINTF_Init()
{
*(unsigned long *)0xB2C = (unsigned long)XTIMING6;
*(unsigned long *)0xB34 = (unsigned long)XINTCNF2;
}
Table 2: External Memory Timing
Memory
Time in ns.
Function
Write Cycle Time
Write Low Time
Write High Time
Read Cycle Time
Read Low Time
Read High Time
((x & 3))
((x & 7)<<2)
((x & 3)<<5)
((x & 3)<<7)
((x & 7)<<9)
((x & 3)<<12)
(1<<14)
| \
XWRACTIVE(1)
| \
XWRLEAD(2)
| \
XRDTRAIL(2)
| \
XRDACTIVE(3)
| \
XRDLEAD(2)
)
Spectrum Digital, Inc
40.4ns
14.0ns
26.4ns
60.8ns
26.8ns
34.0ns
2-5
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