Timer 1 & 2 Load Count Register (Tmrlcr12); Timer 3 Load Count Register (Tmrlcr3); Timer 4 Load Count Register (Tmrlcr4); Table 3-5 Timer 1 & 2 Load Count Register (Tmrlcr12) - GE V7865 Series Hardware Reference Manual

3.3.4 Timer 1 & 2 Load Count Register (TMRLCR12)
Timers 1 & 2 are 16-bits wide and obtain their load count from the Timer 1 & 2
Load Count Register (TMRLCR12), located at offset 0x10 from the address in
BAR2. The mapping of bits in this register are as follows:
Table 3-5 Timer 1 & 2 Load Count Register (TMRLCR12)
Field
Timer 2 Load Count
Timer 1 Load Count
When either of these fields are written (either by a single 32-bit write or separate
16-bit writes), the respective timer is loaded with the written value on the next
rising edge of the timer clock, regardless of whether the timer is enabled or
disabled. The value stored in this register is also automatically reloaded on
terminal count (or timeout) of the timer.

3.3.5 Timer 3 Load Count Register (TMRLCR3)

Timer 3 is 32-bits wide and obtains its load count from the Timer 3 Load Count
Register (TMRLCR3), located at offset 0x14 from the address in BAR2. The
mapping of bits in this register are as follows:

Table 3-6 Timer 3 Load Count Register (TMRLCR3)

Field
Timer 3 Load Count
When this field is written, Timer 3 is loaded with the written value on the next
rising edge of the timer clock, regardless of whether the timer is enabled or
disabled. The value stored in this register is also automatically reloaded on
terminal count (or timeout) of the timer.

3.3.6 Timer 4 Load Count Register (TMRLCR4)

Timer 4 is 32-bits wide and obtains its load count from the Timer 4 Load Count
Register (TMRLCR4), located at offset 0x18 from the address in BAR2. The
mapping of bits in this register are as follows:

Table 3-7 Timer 4 Load Count Register (TMRLCR4)

Field
Timer 4 Load Count
When this field is written, Timer 4 is loaded with the written value on the next
rising edge of the timer clock, regardless of whether the timer is enabled or
disabled. The value stored in this register is also automatically reloaded on
terminal count (or timeout) of the timer.
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Bits
TMRLCR12[31..16]
TMRLCR12[15..0]
Bits
TMRLCR3[31..0]
Bits
TMRLCR4[31..0]
Read or Write
Read/Write
Read/Write
Read or Write
Read/Write
Read or Write
Read/Write
Embedded PC/RTOS Features 47