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Operator Manual for the RCA CDS II CDP18S005
ROM/RAM Module
CDP18S401
The primary function of the ROM/RAM Module
is to hold the system utility software. See Fig. 11. For
this purpose, two socketted 24-pin positions are
provided. Each of these locations accepts either 512-
byte or 1024-byte ROM packages. Also, these ROM
packages may be light-erasable EPROM's or mask-
programmed CDP1832 or CDP1834 ROM's.
4-Kilobyte RAM Module
CDP18S205
The 4-Kilobyte RAM Module, diagrammed in Fig.
12, provides the basic static RAM storage in the
CDS. One module is supplied with the system, and
memory may be expanded by adding modules in the
memory expansion area provided. These modules are
identical, but are assigned to the appropriate ad-
dresses by a Bank Select line wired to pin X of the
added module/:s-l. TIre basic RAM devices are 256 x 4
NMOS chips.
MEMORY ADDRESS
______
~--------~~--------~--------__,
A
[9:q]
BSB-P
MRD-N
ROM CHIP I
BI- DIRECTIONAL
THREE-STATE BU
FFER
MICROTERM INA
ROM
BSB-P
MRD-N
ROM CHIP2.
32.- BYTE RAM
U9
92CS- 29615
Fig. 11 - ROM/RAM Module COP 18S401 block
diagram.
Pin X of this module location is wired to signal
BS8-P from the Address Latch or Bank Select so that
the utility program starts at memory address 8000.
Also on this module is a 32-byte static RAM chip
(CDPI824) to provide a small work area for the
utility software.
It
starts at memory address 8COO.
When the Microterminal option is installed, its
ROM is inserted into location U8. A toggle switch
selects either the standard utility or the Microter-
minal utility ROM. When the switch is in the up
position, the Microterminal ROM is enabled.
Various combinations of ROM packages require
specific link configurations. Refer to the detailed logic
circuit and the tables of Appendix D to define the
required link configuration for a given combination.
The PC board is provided with pre-printed links to
select 1024-byte ROM packages in U7 and U9
(standard utility) and either 512 or 1024 in the
Microterminal ROM (U8); the package types may be
a 2708, CDP1832, or CDP1834 with the pre-printed
links.
BANK
SEL-P
MWR-N
A~I:~-P
A [7:0J-P
MRD-N
32.- PACKAGE
RAM MATRIX
DATA BUS [7:0J -P
92CS- 29616
Fig. 12 - 4-Kilobyte RAM Module COP18S205
block diagram.
The address bus An:O)-p is buffered and wired to
each of the 32 RAM packages. High-order address
bits are decoded and sent to the appropriate groups of
RAM chip-enabled inputs.
l'
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