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30 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Operator Manual for the RCA CDS II CDP18S005
signal
flow
is
horizontal, i.e., wherever
possible
the
printed
wiring
connects identical pins
on
different
connectors. Note that almost all
of
the printed signal
interconnections are made on the exposed
side
of the
backplane. If the user wishes to modify the backplane
wiring
for
some
reason, he can
scratch
out undesired
con,nections
and
wrap his own.
One
notational inconvenience between the CDS
•
d~cumentation and the data
sheet
for the CDP1802
microprocessor should be explained. In the CDS, the
power supply
voltage
VDD (+5
volts)
is the standard
high
signal
level. This voltage is
connected on
the
CPU plug-in board to the microprocessor pin (16)
labeled "V CC" on the CDP1802 data
sheet.
The
label "VCC" is not used in CDS documentation.
Another microprocessor pin (40) may be
connected
to
a higher power supply voltage level to achieve higher
speed, if desired. In the CDS, this pin is
connected
to
the
power supply
voltage labeled "CPUPWR"
(whose level may be
5
volts or higher). The CDP1802
data sheet labels this pin as
"V
0 0", For a CDS for
which both positive CPU supply voltages are at
5
volts.
the user
should
not be
confused
by these
alternative notations. A ground
strap
is provided
connecting logic ground to chassis. It may be
removed by the user if he has an alternate safety
ground in his
system.
Each
of the
solid
boxes in the
CDS
Block Diagram
of
Fig.
6
corresponds
to a supplied module. Both the
Block Diagram and the backplane
wiring schedule
show the modules generally left to right as they ap-
pear when viewed from the backplane side. From the
front. memory is
on
the right and the
110
side
of the
system
is on the left.
Some
precaution should be
exercised
in removing
and
inserting modules into the CDS nest. The module
(FROM CONTROL BOARD)
WAIT- N
CLEAR-N
Q-P
SC[I :O}P
DB~:O]-P
N~:O]-P
cards are keyed so that they
cannot
be inserted in
"
improper positions
or
with improper
orientation.
However, it is possible for a key to be pulled out by a
card
removal. When removing a card,
care
should be
taken to
exert
a lateral force.
without
twisting the
card
lmnecessarily.
It
is also
possible
for a connector
contact
to be dislodged as a result of improper
card
removal. A
short
across to an
adjacent contact
(1
to A
or
A to B, for example)
can
then occur. If trouble
develops after a
card
removal and later reinsertion,
careful
inspection
of
the connector involved is ad-
visable before attributing the problem to failed
electronics.
Special care
should be taken when
cards
are in-
serted into
or
removed from the
extender card socket
because the
socket
has no key to limit harmful up-
and-down
motion
or improper card
slot insertion.
CPU Module CDP18S102
The
CPU
IS
the
heart
of
the
COSMAC
Development
System. It
controls and
addresses
memory, multiplexing the
sixteen-bit
memory
ad-
dress
over a one-byte memory address bus. It
manages
a bidirectional
one-byte data bus. It
senses
and
reacts to
external signals
- interrupt, DMA input
A
request, DMA output request, and four
external.!
flags. It transmits two timing
pulses, or syncs, and
an
encoded CPU state.
When
executing an
input/output
instruction
(I
=
6),
it transmits the three-bit
"N"
field
of the instruction. Refer to the
User
Manual for
the CDP1802 COSMAC Microprocessor, MPM-
201,
for details of the
CPU operation.
Fig. 7
shows
the basic logic contained on this
circuit
module. All named signals are
brought
to the
backplane
connector
for use by the
system.
2 MHz
e
LK OUT
(
~
l
IINT-N
DMAIN-N
DMAOUT-N
MWR-N
(2)
(2)
lTPA-
P
COP 1802
TPB - P
(8)
(8)
+v
(~)
(4)
EF [4
:
0-N
CPUPWR
~
(PIN40)
~
o------o--PI-X
L
:
LK2
tV
¢
(PIN 16)
- -
-.... -
-- - -
PI-Y.21
92CM- 29611
Fig.
7
-
CPU Module CDP18S102 block diagram.
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