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95
Appendix E -
Instruction Summary for RCA CDP1802 COSMAC Microprocessor
The COSMAC instruction summary is given in the
tabulations below. Hexadecimal notation is used to
refer to the 4-bit binary codes.
R(W).O: Lower-order byte of R(W)
R(W).l: Higher-order byte of R(W)
In all registers bits are numbered from the least
significant bit (LSB) to
the
most significant bit (MSB)
starting with
o.
Operation Notation
M(R(N))
~
D;R(N)+ 1
R(W): Register designated by W, where W=N or
X;-orP
This notation means:
The
memory byte pointed to by
R(N) is loaded into D, and R(N) is incremented by l.
INSTRUCTION SUMMARY
_
Register Operations
by
Class of Operation
OP
INSTRUCTION
MNEMONIC
CODE
INCREMENT REG N
INC
1N
DECREMENT REG N
DEC
2N
INCREMENT REG X
IRX
60
GET LOW REG N
GLO
aN
PUT LOW REG N
PLO
AN
GET HIGH REG N
GHI
9N
PUT HIGH REG N
PHI
BN
Memory Reference
OP
INSTRUCTION
MNEMONIC
CODE
LOAD VIA N
LDN
ON
LOAD ADVANCE
LDA
4N
LOAD VIA X
LDX
FO
LOAD VIA X AND ADVANCE
LDXA
72
LOAD IMMEDIATE
LDI
Fa
STORE VIA N
STR
5N
STORE VIA X AND
STXD
73
DECREMENT
Logic Operations++
OP
INSTRUCTION
MNEMONIC
CODE
OR
OR
F1
OR IMMEDIATE
ORI
F9
EXCLUSIVE OR
XOR
F3
EXCLUSIVE OR IMMEDIATE
XRI
FB
AND
AND
F2
AND IMMEDIATE
ANI
FA
SHIFT RIGHT
SHR
F6
76+
SHIFT RIGHT WITH
SHRC
1
CARRY
RING SHIFT RIGHT
RSHR
SHIFT LEFT
SHL
FE
7E+
SHIFT LEFT WITH
SHLC
1
CARRY
RING SHIFT LEFT
RSHL
.NOTE: THIS INSTRUCTION IS ASSOCIATED WITH MORE THAN ONE
MNEMONIC.
EACH MNEMONIC IS INDIVIDUALLY LISTED .
OPERATION
R(N) +1
R(N) -1
R(X) +1
R(N)
.
~D
D-+R(N).O
R(N).l-+D
D-+R(N) .l
OPERATION
M(R(N»-+D; FOR N NOT 0
M(R(N»-+D ;R(N) +1
M(R(X»-+D
M(R(X»-+D; R(X) +1
M(R(P»-+D; R(P) + 1
D-+M(R(N»)
D-+M(R(X»; R(X) -1
OPERATION
M(R(X)) OR
D~
D
M(R(P» OR
D~D;
R(P) +1
M(R(X» XOR
D~D
M(R(P» XOR
D~D;
R(P) +1
M(R(X)) AND
D~D
M(R(P» AND
D~D;
R(P) +1
SHIFT D RIGHT,
LSB(D)~DF,
~MSB(D)
SHIFT D RIGHT,
LSB(D)~DF,
DF~MSB(D)
SHIFT D LEFT, MSB(D)-4-DF,
~LSB(D)
SHIFT D LEFT, MSB(D)-4-DF,
DF-+LSB(D)
. . NOTE: THE ARITHMETIC OPERATIONS AND THE SHIFT INSTRUCTIONS
ARE THE ONLY INSTRUCTIONS THAT CAN ALTER THE DF.
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