Supermicro SuperServer 5019S-TN4 User Manual page 38

SuperServer 5019S-TN4 User's Manual
General Purpose I/O Header
JGPIO1 is a 10-pin general purpose I/O header located near the PCI-E x16 slot. Each pin can
be configured to be an input pin or output pin. The GPIO is controlled via the PCA9554 8-bit
GPIO expansion from PCH SMBus. The base address is 0xF040(D31:F4).
Expander slave address is 0x70. Refer to the table below for pin definitions.
TPM Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM), which is available from
a third-party vendor. A TPM is a security device that supports encryption and authentication in
hard drives. It enables the motherboard to deny access if the TPM associated with the hard
drive is not installed in the system. Please go to the following link for more information on TPM:
http://www.supermicro.com/manuals/other/TPM.pdf. See the table below for pin definitions.
System Management Bus Header
A System Management Bus header for additional slave devices or sensors is located at
JSMB1. See the table below for pin definitions.
SGPIO Header
Pin Definitions
Pin# Definition Pin#
1 +5V 2
3 GP0 4
5 GP2 6
7 GP5 8
9 GP6 10
Trusted Platform Module Header
Pin Definitions
Pin# Definition Pin#
1 LCLK 2
3 LFRAME# 4
5 LRESET# 6
7 LAD3 8
9 3.3V 10
11 LAD0 12
13 SMB_CLK4 (X) 14
15 P3V3_STBY 16
17 GND 18
19 P3V3_STBY 20
External I C Header
2
Pin Definitions
Pin# Definition
1 Data
2 Ground
3 Clock
4 NC
38
Definition
GND
GP1
GP3
GP5
GP7
Definition
GND
No Pin
+5V (X)
LAD2
LAD1
GND
SMB_DAT4 (X)
SERIRQ
GND
LDRQ# (X)