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BINARY ARITHMETIC INSTRUCTIONS
In the two binary arithmetic instructions, Add Binary
and Subtract Binary, the length of both operands is
controlled by the length of the first.
As in decimal arithmetic operations,
if
the operands
are unequal, the second operand is truncated, if
longer, or, is extended with zero-value bytes, if
shorter.
Both instructions operate from right to left.
The
instruction is terminated when the left-end byte has
been processed.
The Condition Code Indicator is set based on the
result as follows:
Condition Code
Add Binary
Subtract Binary
o
Result is Zero
Not Used
I
Difference Less Than Zero
2
Result is Greater Than Zero
Overflow
I
Not Used
Example:
Assume an input tape that contains a block of five
SO-character records.
For processing, the programmer moves each record
to a separate processing area. The Add Binary in-
struction increments the second address of the in-
struction that moves a record to the processing area.
The Subtract Binary instruction, with a branch to
read if the input area has been exhausted, is used to
determine when the last record is processed.
The Input Block, Record Processing, and constant
areas could be allocated as follows:
ALLOCATION OF INPUT AND
RECORD PROCESSING AREA
NAME
OPERATION
OPERAND
ORG
3000
INP
os
400C
RPR
DS
80C
ORC
RPR
ACCT
DS
8C
NAME
DS
25C
ADR
DS
30C
AMT
DS
10C
FILL
DS
7C
HSM
ALLOCATION
3000-3399
3400-3479
3400-3407
3408-3432
3433-3462
3463-3472
3473-3479
STORED VALUE
OF CONSTANTS
(HEX. FORMAT)
42
ALLOCATION OF CONSTANTS
NAME
OPEHATlO'l
OPEHA;-':D
RDIN
DC
A(INP)
:l4RO-:l4R 1
OB
B~
r"CH
DC
A(RO)
00
0,0
TLY
DC
X 'o;iOi) ,
0"
05
CTR
DC
X'O! '
:l4RG
The functional chart on the following page shows the
matching coding steps. Only the steps pertinent to
the Binary Arithmetic Instructions are shown.
Example:
Add Binary of Previous Instruction Binary Value
HSM BEFORE
AND AF:TER
EXECUTION
HSM BEFORE
EXECUTION
ASSEMBLY
INSTRUCTION
GENERATED
INSTRUCTION
HSM AFTER
EXECUTION
Exercise:
Line I
Line 2
INCH
34
0000
0000
0101
0000
00
50
0000
1011
1011
1000
OPERAND
IN4+4 (2), INCR (2)
OP
L1
L2
B1
D1
Bz
D:2
F6
1
I
1
I
1 10
4016 10
1
10
3482
10
General Register one contains 0000
0000
1100
0000
1000
CONDITION CODE
=
2
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