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Comparison And Branching Instructions; Compare Logical (C Lc); Compare Decimal (Cp) - RCA Spectra 70 Training Manual

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COMPARISON AND BRANCHING
There are two instructions that test the relative value
of two operands. The Compare Logical instruction
tests the relative binary value of two operands. The
Compare Decimal instruction tests the relative alge-
braic value of two operands that are in packed format.
Both instructions set the Condition Code based on the
relati ve value of the operands.
COMPARE LOGICAL (CLC) INSTRUCTION
The Compare Logical instruction tests the relative
binary value of two equal-length operands. The two
operands maybe in either packed or unpacked format.
The instruction operates from left to right comparing
the bit values in a byte from each field. The instruc-
tion terminates when either inequality is found or, if
both operands are equal in value, when the last byte
in each field has been compared.
The values of the operands remain unchanged in
memory.
Example:
(Comparison of Key Criteria Fields)
(Character values shown)
MACN
HSM BEFORE
AND AFTER
EXECUTION
27
28
00
7
00
7
01
5
01
5
02 03 04
8
4
3
TACN
02 03 04
8
4
3
05
1
05
1
ASSEMBLY
INSTRUCTION
OPERAND
06
2
06
2
MACN(8), TACN
GENERATED
INSTRUCTION
OP
L
B1
D1
B2
I
D5 16
I
1
1
10
I
2700
10
110
General Register one contains 0000
07
F
07
D
D2
2800 10
I
CONDITION CODE = 2 (FIRST OPERAND ffiGH)
Example:
(Comparison of Address Fields)
HSM BEFORE
AND AFTER
EXECUTION
ASSEMBLY
INSTRUCTION
ADRI
00
01
20
4007 10
OFA7
16
OPERATION
CLC
ADR2
02
03
20
4017 10
OFBI
1G
OPERAND
I
ADRl(2), ADR21
37
GENERATED
INSTRUCTION
OP
General Register one contains 0000
CONDITION CODE
=
(FIRST OPERAND LOW)
COMPARE DECIMAL (CP) INSTRUCTION
The Compare Decimal instruction tests the relative
algebraic value of two packed operands. The oper-
ands may be of unequal length. However, the first
operand should be longer
if
the operands are unequal.
lithe second operand is longer than the first, the ex-
cess bytes do not enter into the comparison. li the
second operand is shorter in length it is assumed to
contain high-order zeros.
The instruction operates from right to left. As the
rightmost half-byte contains the sign, these res-
pective half-bytes are compared first. If the signs
are unlike, the Condition Code is set to reflect the
relative algebraic value of the operands and the
execution of the instruction is terminated.
If the signs are alike, the execution of the instruction
is terminated when the
left~ost
byte of the first oper-
and has been compared with the actual (or zero-ex-
tended) relatively positioned byte of the second
operand. The Condition Code setting, in this case,
is also based on the relative algebraic values of the
operands.
Example:
HSM BEFORE
AND AFTER
EXECUTION
INSTRUCTION
GENERATED
INSTRUCTION
Example:
HSM BEFORE
AND AFTER
EXECUTION
INSTRUCTION
AMT
VAL
1024 10
I
General Register two contains 409610
CONDITION CODE
=
1 (FIRST OPERAND LOW)
CHK
BAL
OPERAND
CHK(3), BAL(4)

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