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DECIMAL ARITHMETIC INSTRUCTIONS

Decimal Add and Subtract

The RCA 70/25 has four decimal arithmetic instruc-

tions, Add Decimal (AP) Subtract Decimal (SP) ,

Multiply Decimal (MP) , and Divide Decimal

(DP) •

All require operands to be in packed format. The

rightmost byte in each field is assumed to contain

the Sign in the low-order four bits.

A sign is generated in the least significant byte of the

result field.

The sign (rightmost four bits of the result operand)

is aC16 (1100)2 for a positive field or a D16 (1101 2 )

if the result field is negat,ive.

The Condition Code Indicator is set following execu-

tion of the instruction based on whether the result

field is zero, positive (greater than zero), negative

(less than zero), or if overflow has occurred. Over-

flow interrupt can occur after add and subtract oper-

ation, but not after multiply or divide. Overflow, if

present, overrides the setting for a positive or neg-

ative result.

As an example, assume the following fields are in

memory:

BAL

I

06

I

07

08

09

50

23

I

87

23

1+

I

(

\

AMT

51

50

51

52

)

23

47

5+

and the following instruction is issued:

ASSEMBLY

OPERATION

OPERAND

INSTRUCTION

AP

BAL(3), AMT(3)

OP

Ll

L2

Bl

Dl

B2

D2

GENERATED

I

FA 16 12

I

2

1

210

1

091110

1

210

1105410

I

INSTRUCTION

General Register two contains 4096 10

29

the result field will appear and the Condition Code

Indicator will be set as follows:

BAL

06 : 07

08

09

50

23 : 10

70

6+

CONDITION CODE

=

3 (overflow)

When overflow occurs, the position to the left of the

result field (HSM 5006 above) is not affected by the

1 carry out of the MSD of the result.

The overflow

setting (Condition Code 3) overrides the positive

result setting which would otherwise be set (Condi-

tion Code 2).

The operands being added (or subtracted) do not have

to be of equal length. The first (and result) operand,

however, should be the longer operand if they are

unequal. The first operand can be considered the

controlling operand.

If the second operand is shorter in length, high-

order zeros are generated by hardware until the

leftmost digit of the first operand has been reached.

If the second operand is longer, its high-order ex-

cess bytes do not affect the result.

It

should be noted that this condition does not neces-

sarily set the overflow condition. Overflow is set

only by a 1 carry from the most Significant digit of

the result.

For example, assume HSM contains a field with the

following value:

BAL

00

01

02

30

75

23

4+

and an Amount field contained the following values:

EXAMPLE 1

EXAMPLE 2

AMT

AMT

20 21 22 23 24 )

20 21 22 23 24/

30

5+ )

30

00 05 21 67

00 03 31 84 2+,

\

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