Cypress CY3274 Application Notes

Powerline communication board design analysis
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Cypress Powerline Communication Board Design Analysis
To get the latest version of this application note, or the associated project file, please
visit http://www.cypress.com/go/AN55427.
This application note describes the on-board circuitry of Cypress's high voltage 110 V to 240 V AC Powerline
Communication (PLC) boards (CY3274). It describes the filter, coupling circuit, and power supply design. It also explains
the selection of critical components necessary to meet performance and compliance requirements.
Contents
1 Introduction .................................................................. 1
2 High Voltage Board Design ......................................... 2
2.1 Transmit Signal Path ........................................... 5
2.2 Receive Signal Path ............................................ 6
2.4 Power Supply ...................................................... 7
2.6 PLC Device Interface ........................................ 10
3 Low Voltage Board Design ........................................ 12
1

Introduction

Powerlines are widely available communication media for PLC technology all over the world. The pervasiveness of
powerline also makes it difficult to predict the characteristics and operation of PLC products. Because of the variable
quality of powerlines around the world, implementing robust communication over powerline has been an engineering
challenge for years. The Cypress PLC solution enables secure and reliable communication over powerline. The
features of Cypress PLC include:
Integrated Powerline PHY modem with optimized filters and amplifiers to work with lossy high voltage and low
voltage powerlines.
Powerline optimized network protocol that supports bidirectional communication with acknowledgement based
signaling. In case of data packet loss due to louder noise on the powerline, the transmitter has the capability to
retransmit the data.
The powerline network protocol supports 8-bit CRC for error detection and data packet retransmission.
A Carrier Sense Multiple Access (CSMA) scheme is built into the network protocol; it minimizes collision between
packet transmissions on the powerline, supports multiple masters, and enables reliable communication on a
bigger network.
A block diagram of the PLC solution with the CY8CPLC20 programmable PLC chip is shown in
the device to the powerline, a coupling circuit is required.
www.cypress.com
Associated Part Family: CY8CPLC10,
3.1 Transmit Signal Path......................................... 13
3.2 Receive Signal Path.......................................... 13
3.4 Power Supply .................................................... 14
3.5 PLC Device Interface ........................................ 15
4 Summary ................................................................... 17
Document History ............................................................ 18
Worldwide Sales and Design Support ............................. 19
Document No. 001-55427 Rev. *E
AN55427
CY8CPLC20
Figure
1. To interface
1

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Summary of Contents for Cypress CY3274

  • Page 1: Table Of Contents

    To get the latest version of this application note, or the associated project file, please visit http://www.cypress.com/go/AN55427. This application note describes the on-board circuitry of Cypress’s high voltage 110 V to 240 V AC Powerline Communication (PLC) boards (CY3274). It describes the filter, coupling circuit, and power supply design. It also explains the selection of critical components necessary to meet performance and compliance requirements.
  • Page 2: High Voltage Board Design

    Cypress provides the CY3274 High Voltage Programmable PLC Development Kit (DVK) for evaluating the Cypress PLC solution. The CY3274 is designed with the filtering and power supply circuitry to operate on 110-240 V AC powerlines. They are compliant to the following CENELEC and FCC standards: ...
  • Page 3 Cypress Powerline Communication Board Design Analysis Figure 2. Cypress High Voltage PLC Board Signal Filtering, Amplification, and Coupling Circuit www.cypress.com Document No. 001-55427 Rev. *E...
  • Page 4 Cypress Powerline Communication Board Design Analysis Table 1. Cypress High Voltage PLC Board Signal Filtering, Amplification, and Coupling BOM Description Designator Qty. Value Manufacturer Manufacturer Part# Vendor High Voltage Coupling Circuit Capacitor Metal Poly Film 0.15uF 300VAC 0.15 µF Panasonic...
  • Page 5: Transmit Signal Path

    T r a n s m i t F i l t e r The FSK transmit signal TX is generated on the FSK_OUT pin of the Cypress PLC device as a low amplitude (~125 mVp-p), unfiltered signal. This signal is applied to the input of an external transmit filter block consisting of opamps U2 and U3, and their related passive components.
  • Page 6: Receive Signal Path

    4. Resistors R9 and R11 set the VCC/2 bias voltage required on the receive pin of the PLC device. Figure 4. Cypress High Voltage PLC Board Receive Filter Response Signal Path Component Requirements The values of the transmit filter passive components are relatively critical; 1% tolerance parts should be used to ensure an accurate response.
  • Page 7: Power Supply

    R32 and R34. When it starts operating, power and regulation voltage sensing is provided to the controller by the auxiliary secondary winding of T2. Figure 5. Cypress High Voltage PLC Board Power Supply Circuit www.cypress.com Document No. 001-55427 Rev. *E...
  • Page 8 Cypress Powerline Communication Board Design Analysis Table 2. Cypress High Voltage PLC Board Power Supply BOM Description Designator Quantity Value Manufacturer Manufacturer Part# Vendor Capacitor Ceramic 10.0uF 10% C26, C33 10.0 µF Taiyo Yuden TMK316BJ106KL-T Digikey 587-1337-1-ND 25V X5R 1206 Capacitor Ceramic 0.10uF 10%...
  • Page 9: Power Path Component Requirements

    C9. When power is disconnected, this capacitor will still be charged unless it can discharge through the power supply. In the Cypress high voltage boards, it was tested that the voltage discharges quickly enough to meet the safety requirements of CENELEC EN60950. However, other power supplies may not discharge the voltage quickly enough and in that case, a bleeder resistor (>...
  • Page 10: Plc Device Interface

    Digikey 507-1179-ND PLC Device Interface This section describes the circuitry that is directly connected to the Cypress PLC device (U1) and not part of the transmitter and receiver circuitry described above. In the schematic shown in Figure 7, there are many components shown that are not required for the final system, but are useful for status indication and debugging.
  • Page 11 Cypress Powerline Communication Board Design Analysis Figure 7. Cypress PLC Device Interface Circuit (on the High Voltage Board) Table 4. Cypress PLC Device Interface BOM (on the High Voltage Board) Description Designator Qty. Value Manufacturer Manufacturer Part# Vendor Discretes and Crystal Capacitor Ceramic 0.10uF 10% 16V X7R 0603...
  • Page 12: Low Voltage Board Design

    This section describes the design of the boards meant for low voltage PLC. These boards are designed to operate on 12-24 V AC/DC powerlines. They are also designed to be low cost and robust systems that do not need to meet any shows the Cypress low voltage board’s transmit CENELEC or FCC compliance standards. The schematic in Figure 8 amplification, receive filter, and coupling circuit to the low voltage powerline.
  • Page 13: Transmit Signal Path

    T r a n s m i t Am p l i f i c a t i o n The FSK transmit signal TX is generated on the FSK_OUT pin of the Cypress PLC device as a higher amplitude (approximately 1.55 Vp-p), unfiltered signal.
  • Page 14: Signal Path Component Requirements

    Cypress Powerline Communication Board Design Analysis Signal Path Component Requirements The chip bead L2 is designed specifically for powerline applications and provides a low DC resistance (0.02 ) and high current handling capability (3 A). Its impedance curve is similar to that of a 0.4 H inductor. The transmit capacitors C10 and C30 should be sized so that they match the impedance of the inductor as closely as possible.
  • Page 15: Plc Device Interface

    Digikey 497-1574-1-ND PLC Device Interface This section describes the circuitry directly connected to the Cypress PLC device (U2) and not part of the transmitter and receiver circuitry described above. In the schematic shown in Figure 10, there are many components shown that are not required for the final system.
  • Page 16 Cypress Powerline Communication Board Design Analysis Figure 10. PLC Device Interface Circuit (on the Low Voltage Board) www.cypress.com Document No. 001-55427 Rev. *E...
  • Page 17: Summary

    Cypress Powerline Communication Board Design Analysis Table 7. PLC Device Interface BOM (on the Low Voltage Board) Description Designator Qty. Value Manufacturer MFGPN Vendor Discretes and Crystal Capacitor Ceramic 22pF 100V C0G 0603 C2, C3 22 pF Murata GRM1885C2A220JA01D Digikey 490-1335-1-ND Capacitor Ceramic 0.01uF 25V C0G 5% 0603...
  • Page 18: Document History

    Cypress Powerline Communication Board Design Analysis Document History Document Title: AN55427 - Cypress Powerline Communication Board Design Analysis Document Number: 001-55427 Revision Orig. of Submission Description of Change Change Date 2759493 09/03/2009 New Spec. 3123303 12/29/2010 Added the Bill Of Materials for all of the circuits.
  • Page 19: Worldwide Sales And Design Support

    Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.

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