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Summary of Contents for Cypress CY3650
- Page 1 Chipsmall Limited consists of a professional team with an average of over 10 year of expertise in the distribution of electronic components. Based in Hongkong, we have already established firm and mutual-benefit business relationships with customers from,Europe,America and south Asia,supplying obsolete and hard-to-find components to meet their specific needs.
- Page 2 CY3650 USB Development System User’s Guide Version 2.4 June 30, 1999...
- Page 3 Expanded explanation of serial buffer size – 12/16/97 Fixed Table 7, J2 Pin 30 changed from “ MR_” (duplicate) to “MW_” – 2/27/98 Added TOC plus a number of changes and corrections 6/30/99 Changed Cypress Logo to be part of file...
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Page 4: Table Of Contents
CY3650 USB Development System User’s Guide 1. Overview............... . . 1 2. - Page 5 CY3650 USB Development System User’s Guide – ii – Ver 2.4...
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Page 6: Overview
Figure 2. Stand-alone Environment Figure 3 shows a block diagram of the development board, illustrating the major system components and the user interfaces. The board supports a family of Cypress USB ICs, with varying amounts of on-chip EPROM, RAM, I/O, Ver 2.4... -
Page 7: Kit Contents
CY3650 USB Development System User’s Guide etc. Consult the individual device specification for details on the IC being emulated. Program ROM 8k x 8 Data RAM Microcontroller Program RAM 256 x 8 8k x 8 Switch Options Serial − Transceiver... -
Page 8: Power Connection
CY3650 USB Development System User’s Guide 3.1. Power Connection The development board is designed to be powered by the enclosed wall transformer. Connect the transformer to a 110V AC source, and to power jack J13 on the board. +5V and +3.3V are generated by regulators on the board. -
Page 9: Switch Settings
CY3650 USB Development System User’s Guide The required communication settings for the PC are: Baud Rate 19200 Data Bits Parity None Stop Bits Flow Control None used It is also recommended that the UART FIFO size settings be set to the minimum values. In Windows 95 the follow- ing steps will change the FIFO settings: •... -
Page 10: Software Installation
The user’s program code will be executed from either a ROM (U5) or program RAM, depending on the setting of switch S3-1 (see Table 2). The U5 ROM is a Cypress CY7C261-45, an 8k x 8 UV-erasable EPROM. Only 4k of the EPROM is currently addressable. -
Page 11: Pc Debug Interface
The I/O ports may be configured as input only by setting switch S1-4 to the open position. I/O port operation of the Cypress USB ICs differs from the operation of the development board. In the IC, writing a ‘0’ to either a port 0/1 output typically puts that bit into Current Sink mode. The value of the output current at each IC pin depends on settings written to internal control registers (consult the specification for more details). -
Page 12: Suspend Mode
CY3650 USB Development System User’s Guide After power up or manual reset, all I/O port bits have a ‘1’ written to them, leaving them in the input/weak-pullup mode. Each port is accessed by performing an I/O write or read operation to the appropriate address. All bits of the port are written or read together. -
Page 13: Target Chip And Connector J1
1. Refer to the diagrams in this documentation for the correct location of J1 pin 1. Pin-outs for the 18-pin DIP and 20 / 24-pin SOIC configurations the Cypress USB IC family are given in Table 3. Note that not all chip pins are implemented on the emulation board. All other pins on connector J1 are test points, and should not be connected to any other signal. - Page 14 CY3650 USB Development System User’s Guide Table 4: J2 Pin Descriptions NAME FUNCTION IA[12:0] 13-bit address bus for program memory ID[7:0] 8-bit Instruction Data from program memory IROMS_ Program ROM chip select (active low) IRAMS_ Program RAM chip select (active low)
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Page 15: J3 - Rs232 Connector
CY3650 USB Development System User’s Guide Table 5: J2 Connector Pin-out Pin # Description Pin # Description IA10 IA11 IA12 IRAMS_ IRAMR_ IRAMW_ IOW_ IOR_ RESET MASTER RESET IROMS_ CLOCK 6.3. J3 - RS232 Connector J3 is a 9-pin male connector for RS-232 interface to a host PC. Connections are shown in Table 6. Pins not listed...
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