Block Diagram - Linear Technology LT3956 Series Manual

LT3956
pin FuncTions
V : Voltage Reference Output Pin (typically 2V). This
REF
pin drives a resistor divider for the CTRL pin, either for
analog dimming or for temperature limit/compensation
of LED load. Can supply up to 100μA.
PWM: A signal low turns off switcher, idles oscillator and
disconnects V pin from all internal loads. PWMOUT pin
C
follows PWM pin. PWM has an internal pull-down resistor.
If not used, connect to INTV
VMODE: An open-collector pull-down on VMODE asserts
if the FB input is greater than the FB regulation threshold
minus 50mV (typical). To function, the pin requires an
external pull-up resistor. When the PWM input is low
and the DC/DC converter is idle, the VMODE condition is
latched to the last valid state when the PWM input was

block DiagraM

EN/UVLO A6
–
1.22V +
2.1µA
SHORT-CIRCUIT
DETECT
+
350mV
–
ISN
ISP
CTRL
BUFFER
CTRL
+
+
1.1V A3
–
V
REF
–
A7
+
2V

.
CC
FB VC
SHDN
1.31V
A5
+
10µA AT
g
m
– FB = 1.25V
1.25V
+
10µA
SCILMB
A10
–
g
m
EAMP
+
10µA AT
5k
A1
+
–
A1 = A1
Q2
20k
FAULT
140µA
LOGIC
TSD
165°C
170k
high. When PWM input goes high again, the VMODE pin
will be updated. This pin may be used to report an open
LED fault. Use a pull-up current less than 1mA.
SS: Soft-Start Pin. This pin modulates oscillator fre-
quency and compensation pin voltage (V
soft-start interval is set with an external capacitor. The
pin has a 10µA (typical) pull-up current source to an
internal 2.5V rail. The soft-start pin is reset to GND by
an undervoltage condition (detected by EN/UVLO pin)
or thermal limit.
RT: Switching Frequency Adjustment Pin. Set the fre-
quency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 1). Do not leave
the RT pin open.
PWMOUT
–
+
OVFB
COMPARATOR
SCILMB
+
A2
–
PWM
COMPARATOR
–
RAMP
VC
GENERATOR
SSCLAMP
100kHz TO 1MHz
OSCILLATOR
10µA
+
1.25V
+
–
FREQ
PROG
SS RT
PWM V
IN
LDO
–
1.25V
A8
INTV
7.15V
+
R Q
DRIVER
S
I
PGND
SENSE
+
A4
–
GND
VMODE
–
1.2V
1mA (MAX)
+
FB
) clamp. The
C
CC
SW
3956f