Mouse And Keyboard Scc - Sun Microsystems 2060 Hardware Engineering Manual

Cpu board
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186
2060 CPU Board Engineering Manual CONFIDEI\TIAL!
l\IOS Read C.ycle
MOS 'Vrite Cycle
24.6. Mouse and Keyboard
see
The MOS read cycle starts out in IDLE state, with the control state counter in
U904 set
to
111. Both msack- and stroben- are high (false); mosrden- goes true
and moswren- stays high (false).
Whenever mosrden- or moswren- go low,
and cs4-
is true
and
sccack remains
false (we are not doing an interrupt acknowledge cycle), the state machine moves
from IDLE to MOSSTROBEN. Both msack- and stroben- remain high.
In
MOSSTROBEN state, the three-bit wait state counter begins
to
increment
from 000, using 60 nsec clock (cOO). The msack- signal remains false, but
stroben- goes low around 220 nsecs into the cycle.
When
the
wait state counter reaches five (l01), the state machine moves from
MOSSTROBEN to MOSEND state; msack- still remains false (high) and
stroben- remains true.
In
MOSEND state, data is clocked into the U903 read buffer by cnten- going
high (false) at 545 nsecs into the read cycle. At the same time cnten- going from
a zero to a one disables the U904's wait state counter. 580 nsecs into the cycle,
mosend- goes low (true).
In
MOSEND state, msack- paces p2_as-, going low at 580 nsecs, and stroben-
goes high at this same time.
When
the
address strobe p2_as- goes high, the read cycle reenters IDLE state.
The MOS write cycle is much like the MOS read cycle. The MOS write cycle
starts out in IDLE state, with the control state counter in U904 set to 111. Both
msack- and stroben- are high (false). When mosrden- stays false (high) and
moswren- goes low (true) a write cycle is signalled; cs4- dropped at 120 nsecs
and ccack- stays high (false) since this is not an interrupt acknowledge cycle.
The write cycle enters MOSSTROBEN state.
At this time msack- remains high but stroben- drops low, causing the appropriate
MOS write strobes to be issued from U904. The wait state counter is enabled
and begins incrementing every 60 nsecs (c60 clock) from an initial count of 000.
When it reaches five (l01) the write cycle enters MOSEND state. When p2_as-
goes high, the cycle ends and the MOS circuitry returns to IDLE state.
The mouse and keyboard ports are both enclosed in the Ul000 8530 serial com-
munications controller.
1.
serial I/O for the keyboard is on
see
port A;
2.
serial I/O for the mouse is on
see
port B.
Inputs to the U1000
see
are:
o
m_d[7:0] -MOS data bus bits 0-7
o
liei_scc - interrupt enable input, daisy-chained from the serial port
see.
o
/scc_ack -
see
acknowledge used in the interrupt acknowledge cycle
[J
mos_a1:0 - MOS bus address bits, terminated with serial resistors R901
and R902. These come from an F244 on
the
other side of the board and are
{Rev 1 of 10 May 1987} COSFlDENTlAL!

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