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MVME2502
Installation and Use
P/N: 6806800R96D
December 2014

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Summary of Contents for Artesyn MVME2502

  • Page 1 MVME2502 Installation and Use P/N: 6806800R96D December 2014...
  • Page 2 Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.
  • Page 3: Table Of Contents

    2.5.2 PMC/XMC Support ............45 2.5.3 Installation of MVME2502-HDMNTKIT1/MVME2502-HDMNTKIT2....47 Installing and Removing the Board .
  • Page 4 4.2.11 General Purpose I/O (GPIO)........... . 85 MVME2502 Installation and Use (6806800R96D)
  • Page 5 4.20.1 POST Code Indicator............104 MVME2502 Installation and Use (6806800R96D)
  • Page 6 5.6.3 Compare High and Low Word Registers ........130 MVME2502 Installation and Use (6806800R96D)
  • Page 7 MVME2502 Specific U-Boot Commands ........
  • Page 8 Related Documentation ............. . 159 Artesyn Embedded Technologies - Embedded Computing Documentation ....159 Manufacturers’...
  • Page 9 Linux Devices Memory Map ........... . 110 MVME2502 Installation and Use (6806800R96D)
  • Page 10 MVME2502 Specific U-Boot Commands ........
  • Page 11 Related Specifications ............160 MVME2502 Installation and Use (6806800R96D)
  • Page 12 List of Tables MVME2502 Installation and Use (6806800R96D)
  • Page 13 MVME2502 Declaration of Conformity ........
  • Page 14 List of Figures MVME2502 Installation and Use (6806800R96D)
  • Page 15: About This Manual

     Replacing the Battery contains the procedures for replacing the battery.  Related Documentation provides a listing of related product documentation,  manufacturer’s documents, and industry standard specifications. MVME2502 Installation and Use (6806800R96D)
  • Page 16 PCI Mezzanine Card (IEEE P1386.1) PrPMC Processor PCI Mezzanine Card Real-Time Clock Rear Transition Module SATA Serial Advanced Technology Attachment Surface Mounted Technology UART Universal Asynchronous Receiver-Transmitter VITA VMEbus International Trade Association Versa Module Eurocard PCI Express Mezzanine Card MVME2502 Installation and Use (6806800R96D)
  • Page 17 Repeated item for example node 1, node 2, ..., node Omission of information from example/command that is not necessary at the time being Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers) Logical OR MVME2502 Installation and Use (6806800R96D)
  • Page 18 Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury Indicates a property damage message No danger encountered. Pay attention to important information MVME2502 Installation and Use (6806800R96D)
  • Page 19 6806800R96A October 2013 Initial Version 6806800R96B April 2014 Re-branded to Artesyn template. Added MVME2502 Declaration of Conformity on page 22. Added Flash Memory Map and updated SPI Flash Memory, Reset Switch and PMC/XMC Sites. Added Installation of MVME2502HDMNKIT1 and MVME2502-HDMNKIT2...
  • Page 20 About this Manual About this Manual MVME2502 Installation and Use (6806800R96D)
  • Page 21: Safety Notes

    Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided. Contact your local Artesyn representative for service and repair to make sure that all safety features are maintained.
  • Page 22 Changes or modifications not expressly approved by Artesyn could void the user's authority to operate the equipment. Board products are tested in a representative system to show compliance with the above mentioned requirements.
  • Page 23 Verify that the length of an electric cable connected to a TPE bushing does not exceed 100  meters. Make sure the TPE bushing of the system is connected only to safety extra low voltage  circuits (SELV circuits). If in doubt, ask your system administrator. MVME2502 Installation and Use (6806800R96D)
  • Page 24 When exchanging the on-board lithium battery, make sure that the new and the old battery are exactly the same battery models. If the respective battery model is not available, contact your local Artesyn sales representative for the availability of alternative, officially approved battery models.
  • Page 25: Sicherheitshinweise

    Produkts in einer anderen Anwendung erfordert eine Sicherheitsüberprüfung für diese spezifische Anwendung. Einbau, Wartung und Betrieb dürfen nur von durch Artesyn ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen.
  • Page 26 Sicherheitshinweise Das Produkt wurde in einem Artesyn Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse B. Diese Grenzwerte sollen einen angemessenen Schutz vor Störstrahlung beim Betrieb des Produktes in Gewerbe- sowie Industriegebieten...
  • Page 27 Weise vermeiden Sie, dass das faceplate oder die Platine deformiert oder zerstört wird. Beschädigung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Produktes und der Zusatzmodule führen. Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige Dokumentation. MVME2502 Installation and Use (6806800R96D)
  • Page 28 Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung. Datenverlust Wenn Sie die Batterie austauschen, können die Zeiteinstellungen verloren gehen. Eine Backupversorgung verhindert den Datenverlust während des Austauschs. Wenn Sie die Batterie schnell austauschen, bleiben die Zeiteinstellungen möglicherweise erhalten. MVME2502 Installation and Use (6806800R96D)
  • Page 29 Batteriehalter beschädigt werden. Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden. Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich. MVME2502 Installation and Use (6806800R96D)
  • Page 30 Sicherheitshinweise MVME2502 Installation and Use (6806800R96D)
  • Page 31: Introduction

    The MVME2502 is designed to work in VMEbus chassis with a 3-row backplane connector environment with a reduced I/O capacity and reduced peripheral power. It is also designed to work in a more modern and higher performance VME chassis environment with a 5-row backplane connector in the 2eVME or the 2eSST protocol mode.
  • Page 32 Based from BSP provided by Freescale which is based from standard Linux version 2.6.32-rc3. Development tool is ltib 9.1.1 (Linux Target Image Builder) from Freescale – VxWorks Boot Firmware: U-Boot-based firmware image in 16 MB SPI Flash. This flash is split into two  8 MB chips. MVME2502 Installation and Use (6806800R96D)
  • Page 33: Standard Compliances

    EN55022 Class B EN55024 AS/NZS CISPR 22, Class A EN300386 ETSI EN 300 019 series Environmental Requirements Directive 2011/65/EU Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment (RoHS) MVME2502 Installation and Use (6806800R96D)
  • Page 34: Figure 1-1 Mvme2502 Declaration Of Conformity

    We have an internal production control system that ensures compliance between the manufactured products and the technical documentation. 03/11/2014 ___________________________________________________ ______ Tom Tuttle, Manager, Product Testing Services Date (MM/DD/YYYY) MVME2502 Installation and Use (6806800R96D)
  • Page 35: Mechanical Data

    QorIQ P2020 1.0GHz, 2GB DDR3 2PMC/XMC ENP2 EXTENDED TEMP, SCANBE MVME2502-02120201E QorIQ P2020 1.2GHz, 2GB DDR3 2PMC/XMC ENP1 IEEE MVME2502-02120201S QorIQ P2020 1.2GHz, 2GB DDR3 2PMC/XMC ENP1 SCANBE MVME2502-021CC QorIQ P2020 1.0GHz, 2GB DDR3 2PMC/XMC ENP2 EXT TEMP, IEEE MVME2502 Installation and Use (6806800R96D)
  • Page 36: Table 1-4 Accessories And Cables

    SERIAL-MINI-D2 SERIAL CABLE - MICRO D SUB CONNECTOR TO STANDARD DB9 ACC/CABLE/SER/DTE/6E SERIAL CABLE, RD 009, 2M, 2 DTE MD/D, RJ45 TO DB9 MVME2502-HDMNTKIT1 MVME2502 HD MOUNTING KIT ENP1 MVME2502-HDMNTKIT2 MVME2502 HD MOUNTING KIT ENP2 MVME2502 Installation and Use (6806800R96D)
  • Page 37: Product Identification

    Introduction Product Identification The following figures show the location of the serial number label. Figure 1-2 Serial Number Location-ENP1 Variant MVME2502 Installation and Use (6806800R96D)
  • Page 38: Figure 1-3 Serial Number Location-Enp2 Variant

    Introduction Figure 1-3 Serial Number Location-ENP2 Variant MVME2502 Installation and Use (6806800R96D)
  • Page 39: Hardware Preparation And Installation

    Installation instructions for the optional PMC/XMC modules and transitions modules are also included. A fully implemented MVME2502 consists of the base board and the following modules: PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility ...
  • Page 40: Unpacking And Inspecting The Board

    Remove the desiccant bag shipped together with the board and dispose of it according to your country’s legislation. The product is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact customer service immediately. MVME2502 Installation and Use (6806800R96D)
  • Page 41: Requirements

    0.04g2/Hz, 15 to 2000 Hz (8 (1hr/axis) GRMS) Shock 20g/11 mS 30g/11 mS Humidity to 95% RH (non-condensing) to 100% RH (non-condensing) 1. ft3/min 2. Flat 15-1000Hz, -6db/octave 1000Hz - 2000Hz [MIL-STD 810F Figure 514.5C-17] MVME2502 Installation and Use (6806800R96D)
  • Page 42: Power Requirements

    The board uses +5.0 V from the VMEbus backplane. On-board power supply generates required voltages for various ICs. The MVME2502 connects the +12 V and -12 V supplies from the backplane to the PMC sites, while the +3.3 V power supplied to the PMC sites comes from the +5.0 V backplane power.
  • Page 43: Equipment Requirements

    Hardware Preparation and Installation The following table shows the power available when the MVME2502 is installed in either a three row or five row chassis and when PMCs are present. Chassis Type Available Power Power With PMCs Three Row 70 W maximum...
  • Page 44: Installing Accessories

    2.5.1 Rear Transition Module The MVME2502 does not support hot swap. Remove power to the rear slot or the system before installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed before placing the transition module.
  • Page 45: Pmc/Xmc Support

    ESD-safe environment. Product Damage Inserting or removing modules with power applied may result in damage to module  components. Before installing or removing additional devices or modules, read the documentation  that came with the product. MVME2502 Installation and Use (6806800R96D)
  • Page 46 Reconnect the system to the power source and then turn on the system. When removing the PMC/XMC, hold it by its long side and exert minimal force when pulling it from the baseboard to prevent pin damage. MVME2502 Installation and Use (6806800R96D)
  • Page 47: Installation Of Mvme2502-Hdmntkit1/Mvme2502-Hdmntkit2

    Installation of MVME2502-HDMNTKIT1/MVME2502- HDMNTKIT2 Installation Procedure 1. Attach washers and hex standoffs to HDD received with the MVME2502-HDMNTKIT1 / MVME2502-HDMNTKIT2. 2. Assemble the SATA adapter board to the blade and ensure that it is properly aligned with the standoff. Attach the screws to anchor the SATA adapter board to the blade.
  • Page 48 Hardware Preparation and Installation 3. Attach hex standoff to main board. MVME2502 Installation and Use (6806800R96D)
  • Page 49: Installing And Removing The Board

    This section describes the recommended procedure for installing the board in a chassis. Read all warnings and instructions before installing the board. The MVME2502 does not support hot swap. Power off the slot or system and make sure that the serial ports and switches are properly configured.
  • Page 50 Connect the appropriate cables to the board. To remove the board from the chassis, reverse the procedure and press the red locking tabs (IEEE handles only) to extract the board. MVME2502 Installation and Use (6806800R96D)
  • Page 51: Completing The Installation

     Verify that hardware is installed and the power/peripheral cables connected are appropriate for your system configuration. Replace the chassis or system cover, reconnect the chassis to power source, and turn the equipment power on. MVME2502 Installation and Use (6806800R96D)
  • Page 52 Hardware Preparation and Installation MVME2502 Installation and Use (6806800R96D)
  • Page 53: Controls, Leds, And Connectors

    Chapter 3 Controls, LEDs, and Connectors Board Layout The following figure shows the components and connectors on the MVME2502 board. Figure 3-1 Board Layout ENP1 Variant MVME2502 Installation and Use (6806800R96D)
  • Page 54: Figure 3-2 Board Layout Enp2 Variant

    Controls, LEDs, and Connectors Figure 3-2 Board Layout ENP2 Variant MVME2502 Installation and Use (6806800R96D)
  • Page 55: Front Panel

    Controls, LEDs, and Connectors Front Panel The following components are found on the MVME2502 ENP1 and ENP2 front panel. Figure 3-3 Front Panel LEDs, Connectors and Switches PMC/XMC 2 PMC/XMC 1 USER 1 Reset Switch Serial Port FAIL SPEED ETH 1...
  • Page 56: Reset Switch

    3.2.1 Reset Switch The MVME2502 has a single push button switch that has both the abort and the reset functions. Pressing the switch for less than three seconds generates an abort interrupt if there is firmware that will read the GPIO2 (0xffdf0095) interrupt register. U-boot does not implement any interrupts and also does not detect the interrupt or display anything when the button is pressed.
  • Page 57: Table 3-1 Front Panel Leds

    GENET2 TSEC2 Front panel No link SPEED Link/Speed Integrated Amber 10/100BASE-T operation RJ45 LED Green 1000BASE-T operation (Left) GENET2 TSEC2 Front panel No activity Activity Integrated Blinking Green Activity proportional to bandwidth RJ45 LED utilization MVME2502 Installation and Use (6806800R96D)
  • Page 58: On-Board Leds

    Controlled by the CPLD. Used for boot-up sequence indicator. Early Power Fail Amber This indicator is lit when the early 3.3V power supply fails. User Defined Amber Controlled by the CPLD User Defined Amber Controlled by the CPLD MVME2502 Installation and Use (6806800R96D)
  • Page 59: Connectors

    Controls, LEDs, and Connectors Connectors This section describes the pin assignments and signals for the connectors on the MVME2502 board. 3.4.1 Front Panel Connectors The following connectors are found on the outside of the MVME2502 board. These connectors are divided between the front panel connectors and the backplane connectors. The front panel connectors include the J1 and the J5 connectors.
  • Page 60 Port B TRD0 - Port B TRD0 + Port B Green LED1Anode/ Yellow LED1 Cathode Port B Yellow LED1 Anode/ Green LED1 Cathode Port B Green LED2Anode/ Yellow LED2 Cathode Port B Yellow LED2 Anode/ Green LED2 Cathode MVME2502 Installation and Use (6806800R96D)
  • Page 61: Front Panel Serial Port (J4)

    Table 3-4 Front Panel Serial Port (J4) Signal Description 3.4.1.3 USB Connector (J5) The MVME2502 uses upright USB receptacle mounted in the front panel. Table 3-5 USB Connector (J5) Pin Name Signal Description +5 V Data -...
  • Page 62: Vmebus P1 Connector

    BGOUT1 DATA 14 DATA 7 BGIN2 DATA 15 BGOUT2 SYSCLK BGIN3 SYSFAIL BGOUT3 BERR SYSRESET +3.3V (not used) LWORD WRITE AM 5 +3.3V (not used) ADD 23 DTACK AM 0 ADD 24 +3.3V (not used) MVME2502 Installation and Use (6806800R96D)
  • Page 63 IRQ5 ADD 34 +3.3V (not used) ADD 4 ADD 35 IRQ4 ADD 3 IRQ3 ADD 36 +3.3V (not used) ADD 2 IRQ2 ADD 37 ADD 1 IRQ1 ADD 38 +3.3V (not used) -12V +12V +12V MVME2502 Installation and Use (6806800R96D)
  • Page 64: Vmebus P2 Connector

    MVME2502 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines. The Z, A, C, and D pin assignments for the P2 connector are the same for both the MVME2502 and MVME7216E/ MVME721E, and are as follows:...
  • Page 65: On-Board Connectors

    The on-board customized SATA connector is compatible with SATA kit, namely VME- 64GBSSDKIT and IVME7210-MNTKIT. Table 3-8 Custom SATA Connector (J3) Signal Description Signal Description SATA POWER ENABLE SATA TX + SATA DETECT SATA TX - MVME2502 Installation and Use (6806800R96D)
  • Page 66: Pmc Connectors

    +3.3V 3.4.2.2 PMC Connectors The MVME2502 supports two PMC sites. It utilizes J14 to support PMC I/O that goes to the RTM PMC. The tables below show the pin out detail of J11/J111, J12/J222, J13/J333 and J14. See Figure 3-1 for the location of the PMC connectors.
  • Page 67 AD 31 CBE0 AD 28 AD 6 AD 27 AD 5 AD 25 AD 4 +3.3V CBE3 AD 3 AD 22 AD 2 AD 21 AD 1 AD 19 AD 0 +3.3V AD 17 REQ64 MVME2502 Installation and Use (6806800R96D)
  • Page 68: Table 3-10 Pmc J12/J222 Connector

    +3.3V PCI RESET AD 14 BUSMODE3 (PULLED AD 13 DWN) +3.3V M66EN BUSMODE4 (PULLED AD 10 DWN) AD 8 +3.3V AD 30 AD 7 AD 29 REQB +3.3V AD 26 GNTB AD 24 +3.3V IDSEL MVME2502 Installation and Use (6806800R96D)
  • Page 69: Table 3-11 Pmc J13/J333 Connector

    AD 52 CBE6 AD 45 CBE5 CBE4 +3.3V AD 40 +3.3V AD 43 PAR64 AD 42 +3.3V AD 41 AD 62 AD 61 AD 40 AD 39 AD 60 AD 38 AD 59 AD 37 MVME2502 Installation and Use (6806800R96D)
  • Page 70: Table 3-12 Pmc J14 Connector

    PMC IO 4 PMC IO 36 PMC IO 5 PMC IO 37 PMC IO 6 PMC IO 38 PMC IO 7 PMC IO 39 PMC IO 8 PMC IO 40 PMC IO 9 PMC IO 41 MVME2502 Installation and Use (6806800R96D)
  • Page 71 PMC IO 27 PMC IO 59 PMC IO 28 PMC IO 60 PMC IO 29 PMC IO 61 PMC IO 30 PMC IO 62 PMC IO 31 PMC IO 63 PMC IO 32 PMC IO 64 MVME2502 Installation and Use (6806800R96D)
  • Page 72: Jtag Connector (P6)

    SCAN 3 TCK 2 +2.5V SCAN 3 TCK 3 SCAN 3 TDI SCAN 3 TRST SCAN 3 TCK3 SCAN 4 TCK 1 SCAN 4 TMS SCAN 4 TDO SCAN 4 TCK 2 +3.3V SCAN 4 TDI MVME2502 Installation and Use (6806800R96D)
  • Page 73: Cop Connector P50(15)

    JTAG TDO COP QACK JTAG TDI COP TRST COP RUNSTOP (Pulled UP) COP VDD SENSE JTAG TCK COP CHECK STOP IN JTAG TMS P2020 SW RESET COP PRESENT COP HARD RESET KEYING COP CHECK STOP OUT MVME2502 Installation and Use (6806800R96D)
  • Page 74: Xmc Connector (Xj1)

    Table 3-14 COP Header (P50) (continued) Signal Description 3.4.2.5 XMC Connector (XJ1) The MVME2502 supports two XMC sites. The board only support J15 for XMC site 1 and J25 for XMC site 2. Table 3-15 XMC Connector (XJ1) Pin out Row A...
  • Page 75: Xmc Connector (Xj2)

    +3.3V JTAG TMS +12V +3.3V +3.3V JTAG TMS -12V +3.3V JTAG TDO GA 0 TX0 - BIST (PULLED TX1+ TX1- +3.3V GA 1 PRESENT +3.3V GA 2 I2C DATA +3.3V MVMRO I2C CLOCK (PULLED DOWN) MVME2502 Installation and Use (6806800R96D)
  • Page 76: Miscellaneous P2020 Debug Connectors(P4)

    This is used for processor debugging. It is a depopulated connector labeled P4, located at the bottom side of the board near the processor. Table 3-17 P2020 Debug Header (P4) Signal Description MSRCDI0 MSRCDI1 MDVAL MSRCDI2 TRIG_OUT MSRCDI3 TRIG_IN MSRCID4 MVME2502 Installation and Use (6806800R96D)
  • Page 77: Switches

    Controls, LEDs, and Connectors Switches These switches control the configuration of the MVME2502. Board Malfunction Switches marked as “reserved” might carry production-related functions and can cause  the board to malfunction if their settings are changed. Do not change settings of switches marked as “reserved”. The setting of switches which ...
  • Page 78: Table 3-18 Geographical Address Switch

    SCON mode which works in conjunction with the VME SCON SEL switch. 2. The VME SCON SEL switch is OFF to select non-SCON mode. The switch is ON to select always SCON mode. This switch is only effective when the VME SCON MAN switch is "ON". MVME2502 Installation and Use (6806800R96D)
  • Page 79: Smt Configuration Switch (S2)

    OFF (Flash Block A) BOOT_BLOCK_A Boot Block B Select OFF (WP disabled) FLASH_WP_N Flash Write Protect OFF (Auto) PMC_XMC_SEL XMC/PMC - Manual Detect Will select if XMC card or or Auto Detect PMC card is used MVME2502 Installation and Use (6806800R96D)
  • Page 80 OFF (Front) GBE_MUX_SEL User Defined switch that will select if the GBE PHY will function on the front panel or on the Back PLANE OFF (CPU Reset Reserved Should be "OFF" for normal Deasserted) operation. MVME2502 Installation and Use (6806800R96D)
  • Page 81: Functional Description

    Chapter 4 Functional Description Block Diagram The MVME2502 block diagram is illustrated in Figure 4-1. All variants provide front panel access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port (one is configurable to be routed to the front panel or the rear panel) through a RJ45 connector and one Type A USB Port.
  • Page 82: Chipset

    Functional Description Chipset The MVME2502 utilize the QorIQ P20x0 integrated processor. It offers an excellent combination of protocol and interface support which includes the following components. The QorIQ P2020 integrated processor or e500 processor core.  PCI Express interface ...
  • Page 83: Integrated Memory Controller

    A fully programmable DDR SDRAM controller supports most JEDEC standard DDR2 and DDR3 memories available. A built-in error checking and correction (ECC) ensures very low bit-error rates for reliable high-frequency operation. ECC is implemented on MVME2502. The memory controller supports the following: 16 GB of memory ...
  • Page 84: Local Bus Controller (Lbc)

    4.2.5 Secure Digital Host Controller (SDHC) The ENP1 and ENP2 variants of the MVME2502 use a soldered down 8GB eMMC device connected to the SDHC interface of the P2020 Processor. This is the only device available on the SDHC interface.
  • Page 85: Dma Controller

    4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC) The eTSEC controller of the device interface to10 Mbps, 100 Mbps, and 1 Gbps Ethernet/IEE 802.3 networks, and devices featuring generic 8 to 16-bit FIFO ports. The MVME2502 uses the eTSEC using the RGMII interface.
  • Page 86: Security Engine (Sec) 3.1

    It includes eight different execution units where data flows in and out of an EU. NOTE: The standard versions of the MVME2502 do not use the encryption enabled versions of the P2020 processor.
  • Page 87: P2020 Strapping Pins

    LA27 cfg_cup0_boot CPU0 boot without waiting. CPU1 holdoff LA16 cfg_cpu1_boot LGPL3/LFW cfg_boot_seq[0:1] Boot sequencer is disabled. No I2C ROM is accessed (default) PLGPL5 DMA2_DACK0 cfg_mem_debug DDR SDRAM controller debug info driven to MSRCID/MDVAL (default) MVME2502 Installation and Use (6806800R96D)
  • Page 88 Core0 clock frequency is greater than 1000MHz ENP2: Core0 clock frequency is less than or equal to 1000MHz LA25 cfg_core1_speed ENP1: Core1 clock frequency is greater than 1000MHz ENP2: Core1 clock frequency is less than or equal to 1000MHz MVME2502 Installation and Use (6806800R96D)
  • Page 89 TSEC_1588_ALARM_ cfg_srds_refclk 100MHz SERDES ref clock for PCIE OUT1 (default) LWE1/LBS1 LA[18:19] cfg_host_agt[0:2] Processor acts as the host root complex for all PCIE busses(default) TSEC2_TXD[4:2] cfg_device_ID[7:5] Rapid IO interface not used => default values used MVME2502 Installation and Use (6806800R96D)
  • Page 90: System Memory

    The MVME2502 design implements 2 banks of 9x8 devices which includes ECC. The standard configurations populate a single memory bank of 2Gb DDR3-800 for a 2GB capacity. The MVME2502 is designed to accommodate 4Gb DDR3 devices supporting up to 8 Gb total when both memory banks are populated with 4Gb devices.
  • Page 91: P2020 Internal Timer

    Default value is 60 seconds. 4.4.4 CPLD Tick Timer The MVME2502 supports three independent 32-bit timers that are implemented on the CPLD to provide fully programmable registers for the timers. Ethernet Interfaces The MVME2502 has three eTSEC controllers. Each one supports RGMII, GMII, and SGMII interface to the external PHY.
  • Page 92: Spi Bus Interface

    4.6.1 SPI Flash Memory The MVME2502 has two 8 MB on-board serial flash. Both contain the ENV variables and the U- Boot firmware image, which is about 513 KB in size. Both SPI flash contain the same programming for firmware redundancy and crisis recovery. The SPI flash is programmed through the JTAG interface or through an on-board SPI flash programming header.
  • Page 93 ICT Programming - This programming is done on exposed test points using a bed of nails  tester. The board power should be switched on before programming. The switch S2-8 should also be powered on to successfully detect the SPI Flash chip. MVME2502 Installation and Use (6806800R96D)
  • Page 94: Firmware Redundancy

    SPI Device controlled by chip select 0. External SPI multiplexing logic is implemented on the MVME2502 to accommodate this chipset limitation. The MVME2502 CPLD controls the chip select to SPI devices A and B. The CPLD chip select control is based on the Switch Bank (S2-2).
  • Page 95: Crisis Recovery

    SPI Device. The MVME2502 supports automatic switch over. If booting one device is not successful, the watchdog will trigger the board reset and it will automatically boot on the other device.
  • Page 96: Front Uart Control

    MVME2502 board. PMC/XMC Sites The MVME2502 hosts two PMC/XMC sites and accepts either a PMC or an XMC add-on card. Only an XMC or a PMC may be populated at any given time as both occupy the same physical space on the PCB.
  • Page 97: Pmc Add-On Card

    PMC/XMC sites are keyed for 3.3V PMC signaling. The PMC and the XMC add-on cards must have a hole in the 3.3 V PMC keying position in order to be populated on the MVME2502 board. The XMC specification accommodates this since it is expected that carrier cards will host both XMC and PMC capable add-on cards.
  • Page 98: Sata Interface

    The XMC add-on cards are required to operate at +5V or +12V (from carrier to XMC). The MVME2502 provides +5V to the XMC VPWR (Variable Power) pins. The MVME2502 does not provide +12V to the XMC VPWR pins. Voltage tolerances for VPWR and all carrier supplied voltage (+3.3 V, +12 V, -12 V) are defined by the base XMC standard.
  • Page 99: Usb

    1. 4.13 I C Devices The MVME2502 utilize two I2C ports provided by the board's processor. The I C bus is a two- wire, serial data (SDA) and serial clock (SCL), synchronous, multi-master bi-directional serial bus that allows data exchange between this device and other devices such as VPD, SPD, EEPROM, RTC, temperature sensor, RTM, XMC, and IDT clocking.
  • Page 100: Reset/Control Cpld

     4.15 Power Management The MVME2502 backplane is utilized to derive +3.3V, +2.5V, +1.8V, +1.5V, +1.2V, +1.05V voltage rail. Each voltage rail is controlled by the CPLD through an enable pin of the regulator, while the output is monitored through power good signal. If a voltage rail fails, the CPLD will disable all of the regulators.
  • Page 101: On-Board Voltage Supply Requirement

    1.26 V +1.05 V 1.0 V 1.1 V 4.15.2 Power Up Sequencing Requirements The power up sequence describes the voltage rail power up timing, which is designed to support all the chip supply voltage sequencing requirement. MVME2502 Installation and Use (6806800R96D)
  • Page 102: Clock Structure

    Functional Description 4.16 Clock Structure A total of three IDT chips, a discrete oscillator and crystal to support all the clock requirements of MVME2502. Figure 4-3 Clock Distribution Diagram MVME2502 Installation and Use (6806800R96D)
  • Page 103: Reset Structure

    Functional Description 4.17 Reset Structure The MVME2502 reset will initiate after the power up sequence if the 1.5 V power supply is "GOOD". When the board is at “ready” state, the reset logic will monitor the reset sources and implement the necessary reset function.
  • Page 104: Real-Time Clock Battery

    Functional Description 4.19 Real-Time Clock Battery The MVME2502 provides a through hole socket for a CR2325 190mAh lithium battery to provide backup power for the on-board RTC when primary power is unavailable. 4.20 Debugging Support The following information shows the details of Artesyn debugging support as applied to the MVME2502.
  • Page 105: Jtag Chain And Board

    Functional Description 4.20.2 JTAG Chain and Board The MVME2502 is designed to work with separate JTAG board rather than with an on-board JTAG multiplexer. The chip supports up to a 6-scan port and the board’s boundary scan requires the following to function: ASSET hardware, JTAG board, and JTAG cable. The MVME2502 provides a 60-pin header that connects to the JTAG board via customize cable.
  • Page 106: Custom Debugging

    Common On-Chip Processor (COP), on page 86 for details. 4.21 Rear Transition Module (RTM) The MVME2502 RTM Block diagram is illustrated below: Figure 4-5 RTM Block Diagram The MVME2502 is compatible with the MVME7216E RTM. MVME2502 Installation and Use (6806800R96D)
  • Page 107: Table 4-8 Transition Module Features

    Four RJ-45 connectors for rear panel I/O: four asynchronous serial channels.  Two RJ-45 connectors with integrated LEDs for rear panel I/O: two 10/100/1000  Ethernet channels. One PIM site with rear panel I/O.  MVME2502 Installation and Use (6806800R96D)
  • Page 108 Functional Description MVME2502 Installation and Use (6806800R96D)
  • Page 109: Memory Maps And Registers

    Memory Maps and Registers Overview The system resources including system control and status registers, external timers, and the QUART are mapped into 16 MB address range accessible from the MVME2502 local bus through the P2020 QorIQ LBC. Memory Map The following table shows the physical address map of the MVME2502.
  • Page 110: Flash Memory Map

    0xffc10000 0xffc1ffff 64 KB PCIE1 IO 0xffc20000 0xffc2ffff 64 KB QUART0 0xffc40000 0xffc4ffff 64 KB QUART1 0xffc50000 0xffc5ffff 64 KB QUART2 0xffc60000 0xffc6ffff 64 KB QUART3 0xffc70000 0xffc7ffff 64 KB Timer 0xffc80000 0xffc8ffff 64 KB MVME2502 Installation and Use (6806800R96D)
  • Page 111 ETSEC2 CCSR 0xffe25000 0xffe25fff 4 KB ETSEC3 CCSR 0xffe26000 0xffe26fff 4 KB SDHCI CCSR 0xffe2e000 0xffe2efff 4 KB Crypto CCSR 0xffe30000 0xffe3ffff 64 KB msi CCSR 0xffe41600 0xffe4167f 128 B mpic CCSR 0xffe40000 0xffe7ffff 256 KB MVME2502 Installation and Use (6806800R96D)
  • Page 112: Programmable Logic Device (Pld) Registers

    Programmable Logic Device (PLD) Registers 5.5.1 PLD Revision Register The MVME2502 provides a PLD revision register that is read by the system software to determine the current version of the timers/registers PLD. Table 5-4 PLD Revision Register PLD Revision Register - 0xFFDF0000...
  • Page 113: Pld Year Register

    Memory Maps and Registers 5.5.2 PLD Year Register The MVME2502 PLD provides an 8-bit register which contains the build year of the timers/registers PLD. Table 5-5 PLD Year Register PLD Year Register - 0xFFDF0004 Field PLD_REV OPER RESET 0x12 5.5.3...
  • Page 114: Pld Sequence Register

    OPER RESET 0x05 5.5.5 PLD Sequence Register The MVME2502 PLD provides an 8-bit register which contains the sequence of the PLD which is in synchrony with the PCB version. Table 5-8 PLD Sequence Register PLD Revision Register - 0xFFDF0007 Field...
  • Page 115: Pld Led Control Register

    1.5V Supply power good indicator 1 - Supply Good and Stable 0 - Otherwise 5.5.7 PLD LED Control Register The MVME2502 PLD provides an 8-bit register which controls the eight LEDs. Table 5-10 PLD LED Control Register PLD LED_CTRL - 0xFFDF001C Field D2 Red...
  • Page 116: Pld Pci/Pmc/Xmc (Slot1) Monitor Register

    Table "On-board LEDs Status" on page 5.5.8 PLD PCI/PMC/XMC (Slot1) Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the status of the PCI/PMC/XMC interface signals. Table 5-11 PLD PCI/PMC/XMC (Slot1) Monitor Register PLD PCI_PMC_XMC_MNTR - 0xFFDF001D Field...
  • Page 117: Pld Pci/Pmc/Xmc (Slot2) Monitor Register

    1 - PCI-X capable 0 - PCI capable 5.5.9 PLD PCI/PMC/XMC (Slot2) Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the status of the SATA/PMC/XMC interface signals. Table 5-12 PLD PCI/PMC/XMC (Slot2) Monitor Register PLD PCI_PMC_XMC_MNTR - 0xFFDF001F...
  • Page 118 1 - PMC is not present 0 - PMC is present XMCP2_N XMC Presence Indicator 1 - XMC is not present 0 - XMC is present PMC2_PCIXCAP PCI Capability Indicator 1 - PCI-X capable 0 - PCI capable MVME2502 Installation and Use (6806800R96D)
  • Page 119: Pld U-Boot And Tsi Monitor Register

    Memory Maps and Registers 5.5.10 PLD U-Boot and TSI Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the status of the U-Boot's normal environment switch and TSI interface signals. Table 5-13 PLD U-Boot and TSI Monitor Register...
  • Page 120 (write 0xA4 into this reg to indicate successful loading of the U- Boot. OPER RESET Field Description BOOT_BLOCK_A Boot Block Manual Selector Switch 1 - SPI0 0 - SPI1 BOOT_SPI Actual Boot Bank 1 - SP1 0 - SPI0 MVME2502 Installation and Use (6806800R96D)
  • Page 121: Pld Write Protect And I2C Debug Register

    5.5.12 PLD Write Protect and I2C Debug Register The MVME2502 PLD provides an 8-bit register which is used to indicate the status of I2C and SPI write-protect manual switches and is used to control the SPI write-enable. The I2C debug ports are also provided in this register which is used in controlling the bus’...
  • Page 122: Pld Test Register 1

    5.5.13 PLD Test Register 1 The MVME2502 PLD provides an 8-bit general purpose read/write register which is used by the software for PLD testing or general status bit storage. Table 5-16 PLD Test Register 1...
  • Page 123: Pld Test Register 2

    General purpose 8-bit R/W field 5.5.15 PLD GPIO2 Interrupt Register The abort switch, Tick Timer 0, 1 and 2 interrupts are ORed together. The MVME2502 provides an interrupt register that the system software reads to determine which device the interrupt originated from.
  • Page 124: Pld Shutdown And Reset Control And Reset Reason Register

    0 - No Interrupt 5.5.16 PLD Shutdown and Reset Control and Reset Reason Register The MVME2502 provides an 8-bit register to execute the shutdown and reset commands. The board's reset reason is also included in this register. Table 5-19 PLD Shutdown and Reset Control and Reset Reason Register...
  • Page 125 1 - Reset is due to LRSTO signal 0 - None Sft_RST Soft Reset - Reset Reason 1 - Reset is due to Soft_RST register being set, or the front panel switch being pressed more than three 0 - None MVME2502 Installation and Use (6806800R96D)
  • Page 126: Emmc Reset Register

    Memory Maps and Registers 5.5.17 EMMC Reset Register The MVME2502 provides a register for EMMC Reset. Table 5-20 PLD Shutdown and Reset Control and Reset Reason Register EMMC Reset Register Field RSVD RSVD RSVD RSVD RSVD RSVD RSVD EMMC_R ST_N...
  • Page 127: Pld Watchdog Control Register

    Enable. If cleared, the watchdog timer is disabled. If set, the watchdog timer is enabled. 5.5.20 PLD Watchdog Timer Count Register The MVME2502 provides a watchdog timer count register. Table 5-23 PLD Watchdog Timer Count Register PLD Watchdog Timer Count - 0xffc80606...
  • Page 128: Pld Watchdog Timer Count Value Register

    Value External Timer Registers The MVME2502 provides a set of tick timer registers to access the three external timers implemented in the timers/registers PLD. These registers are 32-bit and are word writable. The following sections describe the timer prescaler and control register: 5.6.1...
  • Page 129: Control Registers

    Tick Timer 0 Control Register - 0xFFC80202 Tick Timer 1 Control Register - 0xFFC80302 Tick Timer 2 Control Register - 0xFFC80402 Field INTS CINT RSVD RSVD RSVD RSVD RSVD ENINT RSVD COVF OPER RESET 0x0000 MVME2502 Installation and Use (6806800R96D)
  • Page 130: Compare High And Low Word Registers

    If the counter does not initially start at zero, the time to the first interrupt may be longer or shorter than expected. Note that the rollover time for the counter is 71.6 minutes. MVME2502 Installation and Use (6806800R96D)
  • Page 131: Counter High And Low Word Registers

    Table 5-29 Counter High Word Registers Tick Timer 0 Counter Value High Word - 0xFFC80208 Tick Timer 1 Counter Value High Word - 0xFFC80308 Tick Timer 2 Counter Value High Word - 0xFFC80408 MVME2502 Installation and Use (6806800R96D)
  • Page 132: Table 5-30 Counter Low Word Registers

    Tick Timer 0 Counter Value Low Word - 0xFFC8020A Tick Timer 1 Counter Value Low Word - 0xFFC8030A Tick Timer 2 Counter Value Low Word - 0xFFC8040A Field TickTimer Counter Value Low Word (16-bits) OPER RESET 0x0000 MVME2502 Installation and Use (6806800R96D)
  • Page 133: Boot System

    The value 'relocaddr' indicates the location of U-boot in DRAM. The MVME2502 uses Das U-Boot, a boot loader software based on the GNU Public License. It boots the blade and is the first software to be executed after the system is powered on.
  • Page 134: Boot Options

    TFTP server. Configure U-Boot environment variables: setenv ipaddr <IP address of MVME2502> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP> setenv netmask <netmask> setenv bootargs 'root=/dev/ram rw console=ttyS0,9600n8...
  • Page 135: Booting From An Optional Sata Drive

    Make sure that the , and are saved in the USB drive with FAT kernel, dtb ramdisk partition. 2. Configure the U-Boot environment variable: setenv File_uImage <kernel_image> setenv File_dtb <kernel dtb> setenv File_ramdisk <ramdisk> saveenv Initialize USB drive: MVME2502 Installation and Use (6806800R96D)
  • Page 136: Booting From An Sd Card

    Booting VxWorks Through the Network In this mode, the U-Boot downloads and boots VxWorks from an external TFTP server. Make sure that the VxWorks image is accessible to the board from the TFTP server. 2. Configure U-Boot environment variables: MVME2502 Installation and Use (6806800R96D)
  • Page 137: Using The Persistent Memory Feature

    Boot System setenv ipaddr <IP address of MVME2502> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP> setenv netmask <netmask> setenv vxboot 'tftpboot $vxbootfile && setenv bootargs $vxbootargs && bootvx' setenv vxbootfile <VxWorks_image> setenv vxbootargs 'motetsec(0,0)<IP address of TFTP server>:VxWorks h=<IP address of TFTP server>...
  • Page 138: Mvme2502 Specific U-Boot Commands

    U-Boot reports less memory to the Linux kernel through the mem parameter, indicating that the operating system should not use it either. MVME2502 Specific U-Boot Commands Table 6-1 MVME2502 Specific U-Boot Commands Command Description base...
  • Page 139 Boot System Table 6-1 MVME2502 Specific U-Boot Commands (continued) Command Description exit Exit script ext2load Load binary file from a Ext2 file system ext2ls List files in a directory (default /) fatinfo Print information about file system fatload Load binary file from a DOS file system...
  • Page 140 Boot System Table 6-1 MVME2502 Specific U-Boot Commands (continued) Command Description Boot image through network using NFS protocol Memory modify (constant address) List and access PCI Configuration Space pci_info Show information about devices on PCI bus ping Send ICMP ECHO_REQUEST to network host...
  • Page 141: Updating U-Boot

    5. Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0: sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1, replace step 2 with "Select SPI flash # 1:" sf probe 1 MVME2502 Installation and Use (6806800R96D)
  • Page 142 Boot System MVME2502 Installation and Use (6806800R96D)
  • Page 143: Programming Model

    Overview This chapter includes additional programming information for the MVME2502. Reset Configuration The MVME2502 supports the power-on reset (POR) pin sampling method for processor reset configuration. Each option and the corresponding default setting are described in the following table. Table 7-1 POR Configuration Settings...
  • Page 144 DDR Controller LA26 CFG_DDR_SPEED:1=DDR Speed FREQ>= 500 MHz Engineering use LA[22:20] 111111 Default (for future use) UART_SOUT[0], TRIG_OUT, MSRCID[1], MSRCID[4], DMA1_DDONE_B[0] SerDes Ref TSEC_1588_ALARM SerDes expects 100 MHz Clock Config _OUT1 reference clock frequency (default). MVME2502 Installation and Use (6806800R96D)
  • Page 145 (or RGMII, if configured in reduced mode) if its not configured to operate in SGMII mode. ETSEC3 UART_RTS0, The eTSEC3 controller Protocol UART_RTS1 operates using the RGMII protocol if not configured to operate in SGMII mode. MVME2502 Installation and Use (6806800R96D)
  • Page 146 The power-on- reset sequence waits indefinitely for the SerDes PLL to lock (default). System Speed LA[28] SYSCLOCK is above 66 SDHC Card TSEC2_TXD_5 Not Inverted Detect Polarity RAPID System Default RapidIO is not used Size MVME2502 Installation and Use (6806800R96D)
  • Page 147: Interrupt Controller

    Programming Model Interrupt Controller The MVME2502 uses the MPC8548E integrated programmable interrupt controller (PIC) to manage locally generated interrupts. Currently defined external interrupting devices, interrupt assignments, along with corresponding edge/levels, and polarities are shown in the following table. Table 7-2 MVME2502 Interrupt List...
  • Page 148: I2C Bus Device Addressing

    Programming Model I2C Bus Device Addressing The following table contains the I2C devices used for the MVME2502 and its assigned device address. Table 7-3 I2C Bus Device Addressing I2C Bus Address Device Function Size Notes 0x50 256 x 8 0x4C...
  • Page 149: Other Software Considerations

    7.6.3 Quad UART The MVME2502 console RS232 port is driven by the UART built into the P2020 QorIQ chip. Additionally, the MVME2502 has a Quad UART chip which provides four 16550 compatible UART’s. These additional UART’s are internally accessed through the LBC bus. The Quad UART chip clock input (which is internally divided to generate the baud rate) is 1.8432 MHz.
  • Page 150: Lbc Timing Parameters

    10 - LCSn is outputted one quarter bus clock cycle after the address lines. XACS Extra Address to chip-select setup 0 - Address to chip-select setup is determined by ORx[ACS] Cycle length in bus clocks 0011 - bus clock cycle wait state MVME2502 Installation and Use (6806800R96D)
  • Page 151: Clock Distribution

    PHY and SATA bridge are supplied by ICS83905 device. Most of the QorIQ P2020 clocks are generated by ICS840S07I device. Additional clocks required by individual devices are generated near the devices using individual oscillators. The following table lists the clocks required on the MVME2502 along with the frequency and source. Table 7-6 Clock Distribution Device...
  • Page 152: System Clock

    System Clock The system and DDR clock is driven by ICS840S07I device. The following table defines the clock frequency. Table 7-7 System Clock SYSCLK CORE CCB Clock (Platform) DDR3 100MHz 800/1200 MHz 400 MHz 400MHz 25MHz MVME2502 Installation and Use (6806800R96D)
  • Page 153: Real Time Clock Input

    7.7.3 Local Bus Controller Clock Divisor The local bus controller (LBC) clock output is connected to the CPLD for LBC bus transaction. It is also the source of 1 MHz (CPU_RTC) and CPLD tick timers. MVME2502 Installation and Use (6806800R96D)
  • Page 154 Programming Model MVME2502 Installation and Use (6806800R96D)
  • Page 155: Replacing The Battery

    Appendix A Replacing the Battery Replacing the Battery The figure below shows the location of the board battery. Figure A-1 Battery Location ENP1 Variant MVME2502 Installation and Use (6806800R96D)
  • Page 156: Figure A-2 Battery Location Enp2 Variant

    Replacing the Battery Figure A-2 Battery Location ENP2 Variant MVME2502 Installation and Use (6806800R96D)
  • Page 157 The battery provides seven years of data retention, summing up all periods of actual data use. Artesyn Embedded Technologies therefore assumes that there is usually no need to replace the battery except, for example, in case of long-term spare part handling.
  • Page 158 Replacing the Battery 3. Install the new battery with the plus sign (+) facing up. Dispose of the old battery according to your country’s legislation and in an environmentally safe way. MVME2502 Installation and Use (6806800R96D)
  • Page 159: Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications

    The publications listed below are referenced in this manual. You can obtain electronic copies of Artesyn Embedded Technologies - Embedded Computing publications by contacting your local Artesyn sales office. For released products, you can also visit our Web site for the latest copies of our product documentation.
  • Page 160: B.3 Related Specifications

    PCI Local Bus Specification PCI Rev 3.0 Interconnect Special Interest Group PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Specification (PCI-X EM) Revision 2.0a (PCI-SIG) PCI-X Protocol Addendum to the PCI Local Bus Specification (PCI-X PT) Revision 2.0a MVME2502 Installation and Use (6806800R96D)
  • Page 161 Serial ATA II: Extensions to Serial ATA 1.0 Revision 1.0 Organization (SATA-IO) Trusted Computing TPM Specification 1.2, Level 2 Revision 103 Version 1.2 Group (TCG) USB Implementers Universal Serial Bus Specification (USB) Revision 2.0 Forum (USB-IF) MVME2502 Installation and Use (6806800R96D)
  • Page 162 Related Documentation MVME2502 Installation and Use (6806800R96D)
  • Page 164 Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners. © 2014 Artesyn Embedded Technologies, Inc.

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