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Artesyn ATCA-7370 Installation And Use Manual

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ATCA-7370/ATCA-7370-S
Installation and Use
P/N: 6806800P54L
July 2017

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Summary of Contents for Artesyn ATCA-7370

  • Page 1 ATCA-7370/ATCA-7370-S Installation and Use P/N: 6806800P54L July 2017...
  • Page 2 Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.

  • Page 3: Table Of Contents

    3.2.1 Faceplate Connectors ............64 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 4 4.1.17 BIOS Interface towards OS ........... . 84 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 5 5.13 USB 2.0 Interface ..............109 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 6 6.3.2 IPMC SPI Register Map ............148 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 7 Standard Status Codes ............. 169 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 8 PICMG 3.0 Commands ............. 196 Artesyn Embedded Technologies Specific Commands ....... . . 198 8.3.1 Set/Get Feature Configuration Commands .
  • Page 9 10.1.3 Interface ..............244 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 10 Related Documentation ............. . 255 Artesyn Embedded Technologies - Embedded Computing Documentation ....255 Related Specifications .
  • Page 11 Boot Menu ..............97 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 12 Line Control Register (LCR) ........... . .136 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 13 Miscellaneous Status and Control Register ........168 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 14 OEM Get ACPI Power State Command ......... . .204 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 15 HPM Upgrade Package ............248 Table C-1 Artesyn Embedded Technologies - Embedded Computing Publications ....255 Table C-2 Related Specifications .
  • Page 16 List of Tables ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 17 ATCA-7370-S Temperature Sensors ........
  • Page 18 List of Figures ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 19: About This Manual

    IPMC/FPGA/BIOS upgrade and also provides ipmitool installation. Replacing the Battery on page 249, provides battery replacement procedure.  Troubleshooting on page 253, lists the errors, and describes the reasons and solutions to  the problems. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 20 Delta Data Carrier Detect Error Correction Code EDAC Error Detection and Correction EEPROM Electrically Erasable Programmable Read Only Memory Electro-magnetic Compatibility Electro-static Discharge FIFO First In/First Out Field Replaceable Unit FIFO Control Register GPIO General Purpose Input/Output ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 21 Modem Control Register Module Management Controller Management Power Modem Status Register MTBF Mean Time Between Failures NEBS Network Equipment Building System Non-maskable Interrupt NVRAM Non-volatile Random Access Memory Original Equipment Manufacturer Platform Controller Hub PCI-E PCI-Express ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 22 System Management Bus System Management Interrupt Simultaneous Multi Threading Serial Over Lan Serial Presence Detect TERI Trailing Edge Ring indicator THRE Transmit Holding Register Empty Transmitter Holding Register Trusted Platform Module UART Universal Asynchronous Receiver-Transmitter ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 23 Repeated item for example node 1, node 2, ..., node Omission of information from example/command that is not necessary at the time being Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers) Logical OR ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 24 44, Figure 2-2 on page 53, Figure 2-3 on page 56, Figure 5-1 on page 103, Figure 5-2 on page 105, Figure 5- 4 on page 112, and Figure 9-1 on page 231. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 25 6806800P54C April 2013 This version of the document contains, information about ATCA-7370-Single board variant. Consequently, the title has been updated to reflect this change. Updated Chapter 1, Introduction, on page 39, Chapter 2, Hardware Preparation and Installation, on page 47, Chapter 5, Functional Description, on page 103, Figure 9.1...
  • Page 26 About this Manual About this Manual ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 27: Safety Notes

    The blade has been tested in a standard Artesyn system and found to comply with the limits for a Class A digital device in this system, pursuant to part 15 of the FCC Rules, EN 55022 Class A respectively.
  • Page 28 Damage of Blade and Additional Devices and Modules Incorrect installation of additional devices or modules may damage the blade or the additional devices or modules. Before installing or removing an additional device or module, read the respective documentation ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 29 A and input line B so that line A remains powered even if it is disconnected from the power supply circuit (and vice versa). To avoid damage or injuries, always check that there is no more voltage on the line that has been disconnected before continuing your work. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 30 SFP module inoperable. Only remove the optical plug when you are ready to connect a cable to the SFP module. When no cable is connected, cover the port with an optical port plug. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 31 Wrong battery installation may result in hazardous explosion and blade damage. Therefore, always use the same type of Lithium battery as is installed and make sure the battery is installed as described in this manual. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 32 Safety Notes Environment Always dispose of used blades, system components and RTMs according to your country’s legislation and manufacturer’s instructions. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 33: Sicherheitshinweise

    Anwendungen in der Telekommunikationsindustrie und im Zusammenhang mit Industriesteuerungen verwendet werden. Einbau, Wartung und Betrieb dürfen nur von durch Artesyn ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen.
  • Page 34 Sicherheitshinweise Das Blade wurde in einem Artesyn Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse A. Diese Grenzwerte sollen einen angemessenen Schutz vor Störstrahlung beim Betrieb des Blades in Gewerbe- sowie Industriegebieten...
  • Page 35 Kennzeichnen Sie TPE-Anschlüsse in der Nähe Ihres Arbeitsplatzes deutlich als  Netzwerkanschlüsse. Schließen Sie an TPE-Buchsen ausschließlich SELV-Kreise  (Sicherheitskleinspannungsstromkreise) an. Die Länge des mit dem Board verbundenen Twisted-Pair Ethernet-Kabels darf 100 m nicht  überschreiten. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 36 Eingangsleitungen A und B verursachen. In diesem Fall ist Leitung A immer noch unter Spannung, auch wenn sie vom Versorgungskreislauf getrennt ist (und umgekehrt). Prüfen Sie deshalb immer, ob die Leitung spannungsfrei ist, bevor Sie Ihre Arbeit fortsetzen, um Schäden oder Verletzungen zu vermeiden. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 37 Die Schutzkappe eines SFP-Modules dient dazu, die sensible Optik des SFP-Modules gegen Staub und Schmutz zu schützen. Entfernen Sie die Schutzkappe nur dann, wenn Sie beabsichtigen, ein Kabel anzuschließen. Andernfalls belassen Sie die Schutzkappe auf dem SFP-Modul. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 38 Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung. Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung und den Empfehlungen des Herstellers. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 39: Introduction

    The ATCA-7370 is a high-performance ATCA compliant single board computer designed for demanding storage and processing applications. A single processor variant of the ATCA-7370 is also available. It is called ATCA-7370-S. The main features of the ATCA-7370 board are as follows: Designed for NEBS and ETSI compliance ...

  • Page 40: Standard Compliances

    Climatic environmental requirements. The product can only be used in a restricted temperature range. IEC 60068-2-27/32/35 Mechanical environmental requirements IEC 60950-1, EN 60950-1, UL/CSA Safety requirements 60950-1 UL 94V-0/1, Oxygen index for PCBs Flammability below 28% ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 41: Mechanical Data

    Single slot ATCA 30mm x 351mm x 312mm, 8U form factor Net weight 2930g (without DIMMs), 2496g (with 4x 8GB DIMMs) Weight (including Artesyn standard 4105 g (without DIMMs), 4318 g (with 8x 8GB DIMMs) packaging) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 42: Mechanical Layout

    S/N Label Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 43: Mean Time Between Failures

    ATCA processor blade with dual 8-core Intel Xeon E5-2648L (1.8GHz), 0GB, 10G support, NSN variant. ATCA-7370-0GB-S Single Processor Variant ATCA processor blade with single 8-core Intel® Xeon® processor E5- 2648L (1.8 GHz), 0GB, 10G support. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 44: Product Identification

    RTM for the ATCA-737x product series, 2X GBE (SFP), 2X slot for optional HDD, NSN variant. ATCA-7370-ACCEL-MOD Single co-processor module to accelerate cryptography, data compression, and pattern matching. Product Identification Figure 1-1 on page 42 shows the location of the serial number label. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 45: Hardware Preparation And Installation

    Remove the desiccant bag shipped together with the blade and dispose of it according to your country’s legislation. The blade is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact our customer service immediately. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 46: Environmental And Power Requirements

    Blade Overheating and Blade Damage Operating the blade without forced air cooling may lead to blade overheating and thus blade damage. When operating the blade, make sure that the forced air cooling is available on the shelf. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 47: Table 2-1 Environmental Requirements

    Half-sine, 11 m/Sec, 30mSec/Sec Blade level packaging Half-sine, 6 mSec at 180 m/Sec Free Fall 1,200 mm/all edges and corners 1.0 m (packaged) per ETSI 300 019-2-2 (blade level packaging) 100 mm (unpacked) per GR-63-CORE ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 48: Figure 2-1 Location Of Critical Temperature Spots (Blade Top Side)

    Figure 2-1 Location of Critical Temperature Spots (Blade Top Side) 1. Temperature Spot 1 (on Power Entry Module) Max: 90°C (exact location: on top of the transformer) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 49: Power Requirements

    2-2, you will find typical examples of power requirements with and without accessories installed.For information on the accessories' power requirements, refer to the documentation delivered together with the respective accessory or consult your local Artesyn Embedded Technologies representative for further details.
  • Page 50 There is also a dependency on the batch variance of the major components like the processor and DIMMs used. Hence, Artesyn does not represent or warrant that measurement results of a specific board provide guaranteed maximum values for a series of boards.

  • Page 51: Blade Layout

    Blade Layout Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 52: Installing The Blade Accessories

    The corresponding installation/removal procedures are described in this section. The location of the DIMM memory modules are shown in Figure "Blade Layout" on page ATCA-7370 supports low-voltage DDR3 memory. This is available upon request. Damage of Circuits Electrostatic discharge and incorrect module installation and removal can damage circuits or shorten its life.
  • Page 53 2. Open the locks of the socket at both sides.The memory module is automatically lifted up. 3. Remove the module from the socket. Repeat steps 2 to 3 in order to remove further memory modules. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 54: Cave Creek Module

    Hardware Preparation and Installation 2.4.2 Cave Creek Module This section describes the steps to install/remove the cave creek module. The following figure illustrates the location of the cave creek module. Figure 2-3 Cave Creek Module ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 55 2. Align and fasten the four M2.5x 8mm standoffs from bottom side of the cave creek module, using the four M2.5x 4mm screws. 3. Insert the cave creek module in the socket so that the module's standoffs fit in the blade's mounting holes. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 56: Figure 2-4 Cave Creek Module Installation

    2. Loosen and remove the four screws that holds the cave creek module. 3. Remove the cave creek module from the blade. on page Reinstall the blade into the system as described in Installing and Removing the Blade ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 57: Installing And Removing The Blade

    Incorrect blade installation and removal can result in blade malfunctioning. When plugging the blade in or removing it, do not press on the faceplate but use the handles. 2.5.1 Installing the Blade To install the blade into an AdvancedTCA shelf, proceed as follows. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 58 5. Fully insert the blade and lock it to the shelf by squeezing the lever and the latch together, and turning the handles towards the faceplate. If your shelf is powered on, as soon as the blade is connected to the backplane power pins, the blue LED is illuminated. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 59: Removing The Blade

    Before touching the blade or electronic components, make sure that you are working in an ESD-safe environment. Blade Malfunctioning Incorrect blade installation and removal can result in blade malfunctioning. When plugging the blade in or removing it, do not press on the faceplate but use the handles. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 60 Wait until the blue LED is permanently illuminated, before removing the blade. 3. Remove the faceplate cables, if applicable. 4. Loosen the screws of the faceplate until the blade is detached from the shelf. 5. Remove the blade from the shelf. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 61: Controls, Indicators, And Connectors

    Chapter 3 Controls, Indicators, and Connectors Faceplate The following figure illustrates the connectors, keys, and LEDs available on the faceplate: Figure 3-1 Faceplate LEDs ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 62: Leds And Interfaces

    Red/green (controlled by IPMC). If both red and green are lit, it may look amber): This LED is controlled by higher layer software such as middleware or applications. "OFF" after power up and lamp test finished Turned green "ON" by OS startup script or application. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 63 Blue: Blade is ready to be extracted The "Out of service", "In Service" and "Attention" LEDs are directly controlled by IPMC. A higher application software can issue "set/get FRU LED state" command to IPMC to access them. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 64: Connectors

    Controls, Indicators, and Connectors Connectors 3.2.1 Faceplate Connectors Table 3-2 RJ45 Console Connector Pinout Signal Table 3-3 USB Connector Pinout Signal VP5_USB USB_x_D- USB_x_D+ ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 65: Backplane Connectors

    Voltage Return A Power Building Block Voltage Return B Power Building Block Early -48V A Power Building Block Early -48V B Power Building Block Enable A Power Building Block -48V A Power Building Block -48V B ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 66: Table 3-5 Zone 2 Connector J20 Pin Assignment

    F1[2]_RX- F1[3]_TX+ F1[3]_TX- F1[3]_RX+ F1[3]_RX- F1[0]_TX+ F1[0]_TX- F1[0]_RX+ F1[0]_RX- F1[1]_TX+ F1[1]_TX- F1[1]_RX+ F1[1]_RX- Base Channel 1 BI1_DA+ BI1_DA- BI1_DB+ BI1_DB- BI1_DC+ BI1_DC- BI1_DD+ BI1_DD- Base Channel 2 BI2_DA+ BI2_DA- BI2_DB+ BI2_DB- BI2_DC+ BI2_DC- BI2_DD+ BI2_DD- ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 67: Table 3-7 Zone 3 Connector J30 Pin Assignment

    PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1 PCIE_CPU1_T PCIE_CPU1_T RX12+ RX12- TX12+ TX12- RX13+ _RX13- X13+ X13- PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1 PCIE_CPU1_T PCIE_CPU1_T RX14+ RX14- TX14+ TX14- RX15+ _RX15- X15+ X15- PCIE CLK_100M_A CLK_100M_ CLK_100M_ CLK_100M_ ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 68: Mezzanine Card Connector

    Table 3-10 Mezzanine Card Connector Signals Signal Signal Signal Signal SMB_SDA SMB_SCI (from GBE_Refclk_N GBE_Refclk_P IPMC) VCC3V3_MGMT CRU_Refclk_N CRU_Refclk_P PCIe_refclk_N PCIe_refclk_P PCIe_TX1_N PCIe_TX1_P PCIe_TX0_N PCIe_TX0_P PCIe_RX1_N PCIe_RX1_P PCIe_RX0_N PCIe_RX0_P PCIe_TX3_N PCIe_TX3_P PCIe_TX2_N PCIe_TX2_P PCIe_RX3_N PCIe_RX3_P PCIe_RX2_N PCIe_RX2_P ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 69 Table 3-10 Mezzanine Card Connector Signals (continued) Signal Signal Signal Signal PCIe_TX5_N PCIe_TX5_P PCIe_TX4_N PCIe_TX4_P PCIe_RX5_N PCIe_RX5_P PCIe_RX4_N PCIe_RX4_P PCIe_TX7_N PCIe_TX7_P PCIe_TX6_N PCIe_TX6_P PCIe_RX7_N PCIe_RX7_P PCIe_RX6_N PCIe_RX6_P RESET_N PRSNT_N PWR_EN PWR_GD VCC12 VCC12 VCC3V3 VCC3V3 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 70: On-Board Connectors

    The TPM header is installed on the board and is used for port 80 card for debug monitor. It is also reserved for TPM module customization. The head pin pitch is 2.54 mm. Figure 3-2 TPM Connector Pinout ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 71: Fpga Jtag Head

    Its pin 1 is clearly marked on the PCB and by default are "OFF". 3.3.1 PCH Switch Table 3-11 Switch SW2 Settings Switch Function Default SW2.1 GPIO6 ON: Load default BIOS setting SW2.2 GPIO7 ON: BIOS Crisis Recovery ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 72: Fpga Switch

    FPGA through cable, the IPMC should be in reset state. S7.2 FPGA image flash BANK selection when using cable to download FPGA image ON: select recovery BANK (U150) OFF: select default BANK (U151) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 73: Bios

    Chapter 8, Supported IPMI Commands, on page 181. The BIOS used on the blade is based on the Phoenix UEFI BIOS with several Artesyn extensions integrated. Its main features are as follows: Initialize CPU, chipset and memory ...

  • Page 74: Update And Recovery

    4.1.1 Update and Recovery The ATCA-7370 has two different ways to update the BIOS. Flash tool (FCU and ipmitool in Linux) is used for normal upgrade mode.  USB CD-ROM or USB flash device is used in BIOS recovery modes.

  • Page 75: Dram Support

    ECC. – ECC Error Report Support: ATCA-7370 supports ECC error reporting. When an ECC error occurs, the memory controller hardware increments an ECC error count and triggers the System Management Interrupt (SMI) to let BIOS or OS handle the ECC error.
  • Page 76 Given a dual rank DIMM and if all the 10 errors occur in one single rank i.e. either rank 0 or rank 1 DIMM, then an ECC event is recorded. Available memory space below 4GB boundary - The ATCA-7370 provides 3.25 GB memory ...

  • Page 77: Interrupt Routing

    4.1.5 I/O Device Configuration 4.1.5.1 Serial Ports The ATCA-7370 supports two serial ports in OS, but supports only one serial port for console redirection in the BIOS. The default value is 3F8h/IRQ4. 4.1.5.2 Integrated SATA Controller The BIOS provides setup items to configure the embedded serial ATA controller for debugging purposes.It also supports hard disk auto typing.

  • Page 78: Boot Options

    4.1.6 Boot Options The ATCA-7370 supports the BIOS Boot Specification 1.01. The BIOS identifies all IPL (BAID, BEV) devices and BCV devices (hard drives, USB sticks) in the system and will attempt to boot them in the order specified in startup.

  • Page 79: Network Boot

    BIOS The ATCA-7370 supports four SAS ports. Two local SAS ports are located in the RTM module, the other two SAS ports are connected to the external ports of the RTM. The SAS physical port number is assigned as follows: P0 - Local SAS 1 which is far from RTM zone 3 connector ...

  • Page 80: Console Or I/O Redirection

    IPMC. 4.1.9 IPMI Support The ATCA-7370 BIOS provides the following IPMI support: Checks if the IPMI controller is active. If not, it will display an appropriate error message.  Reads self-test result from the IPMI controller display. It will display an error message if the ...

  • Page 81: Watchdogs

    OS via SMBIOS structure type38 and is tested with Linux OpenIPMI driver. 4.1.9.1 Watchdogs The watchdogs in ATCA-7370 are implemented by BMC watchdog. The BIOS uses BMC watchdog in two phases. BIOS phase  OS phase ...

  • Page 82: Bios Setup Layout

    BIOS Source (boot flash device bank)  4.1.13 USB 2.0 Ports The ATCA-7370 supports three external 2.0 ports. All USB ports support low-speed, full-speed and high-speed using the USB 2.0 Enhanced Host Controller Interface (EHCI). 4.1.14 Supported Operating Systems The ATCA-7370 supports the following operating systems. DOS is used for debugging.

  • Page 83: Serial Console And Bios Printouts

     The BIOS printout does not cause any significant delay to boot up. Default terminal emulation is VT-100. The ATCA-7370 vendor, Phoenix, specifies and documents the terminal hot keys and keystroke mapping for VT-100, ANSI and VT-UTF8. The BIOS prints all errors found during BIOS phase. In addition to errors, BIOS prints the information contained in the Board Information to console.

  • Page 84: Bios Interface Towards Os

    It supports the following options. Table 4-3 BIOS CLI Tool - IPMIBPAR Option Description Enable debug output -a xx IPMB Address, if not present local IPMC is used Get device ID Get IPMI Boot Parameter USER area ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 85: Setup Utility

    Menu Options Main Provides system information, date, and time Advanced Advanced features including Boot, Processor, Peripheral, USB, Memory, South Bridge and SMBIOS event log settings. Security Supervisor and User password options. Boot Boot priority order. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 86: Table 4-5 Sct Navigation Keys

    When you are in a sub-menu, The <Esc> key allows you to exit to the upper menu. Function When other function keys become available, they are displayed at the right of the screen keys along with their intended function. General Help Load Optimized Defaults Save ESC and Exit ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 87: Main Menu

    <Tab> key to move from hour to minute, minute to second, month to day, or day to year. There is no default value. System Gives the BIOS version, CPU type, memory type size, etc., Information ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 88: Advanced Menu

    Set hard drive and controller configuration. See section Configuration. Memory Configuration Displays and provides options to change the memory settings. See section Memory Configuration. South Bridge Configuration Set south bridge configuration. See section South Bridge Configuration. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 89: Boot Configuration

    Long or noisy lines may require lower speeds. Options: 9600, 19200, 38400, 57600 and 115200. Default is 9600. Front Network Boot Controls execution of the Option ROM for the Front Panel Ethernet controller. Options: Disabled and Enabled. Default is Disabled. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 90 Enable or Disable O/S Watchdog Timer. It is not available if the OS Watchdog is disabled. Options: Disabled and Enabled. Default is Disabled. OS Boot Watchdog Choose Timeout value for OS Boot Watchdog Timer. Timeout Range: 180 ~ 6000. Default is 300. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 91: Processor Configuration

    Default is Enabled. Intel(R) SpeedStep(tm) Enable processor performance states (P-States). Options: Disabled and Enabled. Default is Enabled. Turbo Mode Enable Processor Turbo Mode. TM must also be enabled. Options: Disabled and Enabled. Default is Disabled. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 92: Peripheral Configuration

    Default is AHCI. Serial ATA Port 0 / Hard Disk 0 Displays the identity of the device attached. Serial ATA Port 1 / Hard Disk 1 Serial ATA Port 2 / Hard Disk 2 SAS HDD 1 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 93: Memory Configuration

    Select ECC Runtime errors type to be logged in SMBIOS event log. Select type include Correctable Error (CE), Uncorrectable Error (UC), both CE and UC error (Both). Options: Disabled, CE, UC, and Both. Default is Both. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 94: South Bridge Configuration

    Default is Enabled. USB2 Control Enable or disable Front Panel USB port 2. Options: Disabled and Enabled. Default is Enabled. RTM USB Control Enable or disable RTM USB port. Options: Disabled and Enabled. Default is Enabled. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 95: Smbios Event Log

    Option: Disabled and Enabled. Default is Enabled. View SMBIOS event log View SMBIOS event log. Mark SMBIOS events as Mark SMBIOS events as read. Marked SMBIOS events will not be displayed. read Clears SMBIOS events Clears SMBIOS events. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 96: Security Menu

    4.2.3 Security Menu The figure below shows the Security Menu options. Figure 4-3 Security Menu Table 4-16 Security Menu Field Description Set Supervisor Password Set Setup Supervisor Password. Set User Password Set Setup User Password. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 97: Boot Menu

    Sets the order of the USB HDD devices in USB group. SAS HDD Drive Sets the order of the SAS HDD devices in SAS HDD group. SATA HDD Drive Sets the order of the SATA HDD devices in SATA HDD group. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 98: Save And Exit Menu

    Table 4-18 Save and Exit Menu Field Description Exit Saving Changes This option is same as pressing <F10> key. Saves all changes of all menus, then exits the setup configure driver. The option finally resets the system automatically. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 99 This option is same as pressing <F9> key. Loads standard default values. Discard Changes Loads the original value of the boot time, but does not load the default setup value. Save Changes Saves all changes of all menus, but does not reset the system. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 100 BIOS ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 101: Functional Description

    IPMB-B Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 102: Processor

    Supports all the existing Streaming SIMD Extensions 2 (SSE2), Streaming SIMD Extensions  3 (SSE3) and Streaming SIMD Extensions 4 (SSE4) Supports several Advanced Technologies: Execute Disable Bit, Intel 64 Technology,  Enhanced Intel SpeedStep Technology, Intel Virtualization Technology, and Simultaneous Multi Threading (SMT) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 103: Memory

    ATCA-7370 provides a dual Intel Xeon Processor E5-2648L CPU with IMC. Each IMC supports four independent 72-bit (64-bit Data + 8-bit ECC) wide DDR3 memory channels. ATCA-7370 supports one VLP DIMM sockets for each memory channel resulting in a total of eight DDR3 DIMM sockets.

  • Page 104: Platform Controller Hub (Pch)

    DMI connect to CPU  Eight lanes PCIe Gen2  Four ports SAS  Six serial ATA (SATA) interfaces  Fourteen USB 2.0 interfaces  SPI Interface for BIOS  32-bit PCI Interface  SM bus  ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 105: Figure 5-3 Pch Block Diagram

    Functional Description The following figure shows the I/O functions provided by C604 chipset and those used on ATCA-7370. Figure 5-3 PCH Block Diagram ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 106: Ethernet Ports

    5.6.1 ATCA 3.0 Base Interface The dual Base interface of the ATCA-7370 Node board is from two ports of Intel I350 quad ports Gigabit Ethernet Controller. The device offers quad 10/100/1000Base-T and quad 1000Base-X interfaces. A serial EEPROM is used for storage of configuration parameters such as the MAC addresses.

  • Page 107: Update Channel Ethernet

    Functional Description 5.6.4 Update Channel Ethernet The ATCA-7370 supports one Gigabit Ethernet on update channel on P20 of Zone2 connector. It uses SerDes interface and occupies the port 0 of update channels. Storage ATCA-7370 supports the following types of storage: Front panel USB DISK (up to two ports) ...

  • Page 108: Serial Redirection

    Default power-down backup solution is an external +3V lithium battery with a capacity of  200mAh, which provides 3 years of backup. Optional power-down backup method uses a Super CAP with a 1 Farad capacity. This  provides 300 hours of RTC/SRAM backup. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 109: Serial Ata

    The C604 chipset provides internal USB1.1/ USB 2.0 host controllers with 14 USB2.0 ports. Two ports are routed to the faceplate, one port is routed to the RTM on ATCA-7370. The ports available at the faceplate are routed to a dual stacked connector. The ports are USB 2.0 compliant.

  • Page 110: Smbus Connections

    Functional Description 5.14 SMBus Connections The following figure shows the overall SMBus connections on ATCA-7370. Figure 5-4 Overall SMBus Connections Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant.

  • Page 111: Glue Logic Fpga

    LPC interface under PCH for internal register access  SPI Interface under IPMC for internal register and BIOS access  Reset control logic  Interruption control logic  BIOS bank selection control  Dual UART controller with routing control  ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 112 Functional Description ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 113: Maps And Registers

    Maps and Registers Interrupt Structure The ATCA-7370 supports NON-APIC (legacy PIC Mode) and APIC mode of interrupt delivery to the CPUs. The 8259 PIC mode interrupt concentrator supports 16 interrupts (8 external signal inputs). The IO-APIC device, supports 24 interrupt sources. In APIC mode, the C604 chipset supports only front side bus interrupt delivery (not the serial APIC mode).

  • Page 114: Table 6-1 Interrupt Source Signals List

    This signal route to IPMC interrupt to process board insertion or removing event. SoL I2C SoL_ALERT_N SoL message interrupt to IPMC. PCIE devices PCIE endpoint devices such as 82599, I350 use MSI in-band interrupt mode. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 115: Pic (Non-Apic) D31:F0 Interrupt Mapping

    (HPET) PS/2 Mouse IRQ12 via SERIRQ, SCI, TCO, or PIRQ# or Timer#3 (HPET) Internal State Machine output based on processor FERR# assertion. May optionally be used for SCI or TCO interrupt if FERR# not needed. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 116: Apic (D31:F0) Interrupt Mapping

    Table 6-3 APIC Mode Interrupt Mapping Interrupt Source Cascade from 8259 1 Not Assigned 8254 Counter 0, Timer 0 (legacy mode) Not Assigned Not Assigned Not Assigned Not Assigned Not Assigned RTC, Timer 1 (legacy mode) Option for TCI, TCO ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 117 In APIC mode, the PCI Interrupts A:H are mapped to IRQ[16:23]. When programming the polarity of internal interrupt sources on the APIC, interrupts 0 through 15 receive active-high internal interrupt sources; interrupts 16 through 23 receive active-low internal interrupt sources. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 118: Non-Maskable Interrupt Generation

    Purpose input and routed as NMI (by GPIO_ROUT at Device 31: Function 0 Offset B8) The GPIO[15:0] can generate NMI. On the ATCA-7370, the GPIO3 of PCH connects to the FPGA. The IPMC can request an NMI through controlling the GPIO3 of PCH connect to FPGA.
  • Page 119 This register is set by hardware once operation is complete. Bit is cleared by hardware when a new operation is enabled. An SMI is generated when this bit is set due to a sparing copy completion event. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 120: Registers

    Table 6-7 "Register Access Type" Table 6-7 "Register Access Type" are used. Table 6-6 Register Default Default Description Not applicable or undefined 0 or 1 Default value after RST_N is valid or after PCH_PLTRST deassertion. Undef. Undefined value ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 121: Register Decoding

    The FPGA registers may be accessed from the host or the IPMI. For the host, the LPC bus interface is used. The IPMC uses an SPI interface. 6.2.1.1 LPC Decoding The LPC bus supports different protocols. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 122: Spi Register Decoding

    All SPI accesses from the IPMC towards the FPGA with the SPI select signal BMC_SPI_S0_N asserted are for the internal registers. Table 6-9 IPMC SPI Register SPI Address Range Address Range Name Description 0x00 - 0x7F REGISTERS FPGA Registers ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 123: Post Code Register

    Table 6-11 Super I/O Configuration Index Register LPC I/O Address: 0x4E Description Default Access INDEX. Configuration Index. 0xff LPC: r/w Table 6-12 Super I/O Configuration Data Register LPC I/O Address: 0x4F Description Default Access DATA Configuration Data. 0xff LPC: r/w ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 124: Entering The Configuration State

    6.2.3.4 Super I/O Configuration Registers Address locations that are not listed are considered reserved register locations. Reads to reserved registers may return non-zero values. Writes to reserved locations may cause system failure. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 125: Table 6-13 Global Configuration Register Summary

    A write to this register selects the current logical device. This allows access to the control and configuration registers for each logical device. Table 6-15 Super IO Device Revision Register Index Address: 0x21 Description Default Access Device Revision 0x01 LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 126: Table 6-16 Super Io Lpc Control Register

    SERIRQ Mode: LPC: r 1: Continuous Mode UART Clock pre-divide LPC: r/w 00: divide by 1 01: divide by 8 10: divide by 26 (CLK_UART is 48 MHz) 11: reserved Reserved LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 127: Table 6-18 Logical Device Configuration Register

    Table 6-19 Logical Device Enable Register Index Address: 0x30 Description Default Access Logical Device Enable: LPC: r/w 0: disabled. Currently selected device is inactive. 1: enabled. The currently selected device is enabled. Reserved LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 128: Table 6-22 Logical Device Common Decode Ranges

    Register 0x61is 0xF8. See table below for Common Decode Ranges: Table 6-22 Logical Device Common Decode Ranges IO Address range Description 0x3F8 - 0x3FF COM1 0x2F8 - 0x2FF COM2 0x2E8 - 0x2EF COM3 0x3E8 - 0x3EF COM4 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 129: Table 6-23 Logical Device Primary Interrupt Register

    Condition, Transmit Data Request, Receiver Data Available or Receiver Time Out) and setting the OUT2 bit in the MCR. Table 6-24 Logical Device 0x74 Reserved Register Index Address: 0x74 Description Default Access Reserved 0x04 LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 130: Uart1 And Uart2 Register Map

    Interrupt Identification Register (IIR). Read Only Base + 2 FIFO Control Register (FCR). Write Only. Base + 3 Line Control Register (LCR) Base + 4 Modem Control Register (MCR) Base + 5 Line Status Register (LSR). Read Only ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 131: Uart Registers Dlab=0

    (First In/ First Out) FIFO mode, this register latches the value of the data byte at the top of the FIFO. Table 6-28 Receiver Buffer Register (RBR) if DLAB=0 LPC IO Address: Base Description Default Access Receiver Buffer register (RBR) Undef. LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 132: Transmitter Holding Register (Thr)

    Transmitter Holding Register Empty (THRE) LPC: r/w interrupt enable/disable 1: THRE interrupt enabled 0: THRE interrupt disabled Receiver line status interrupt enable/disable LPC: r/w 1: receiver line status interrupt enabled 0: receiver line status interrupt disabled ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 133: Interrupt Identification Register (Iir)

    Modem Status: one or more of the modem input signals has changed state Table 6-32 Interrupt Identification Register (IIR) LPC IO Address: Base + 2 Description Default Access Interrupt status bit: LPC: r 1: no interrupt pending 0: interrupt pending ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 134: Table 6-33 Interrupt Identification Register Decode

    Non-FIFO mode: Reading the Data Buffer is full. Receiver Buffer Register. available. FIFO mode: Trigger level was FIFO mode: Reading bytes reached. until Receiver FIFO drops below trigger level or setting RESETRF bit in FCR register. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 135: Fifo Control Register (Fcr)

    1: Transmitter and Receiver FIFO enabled 0: FIFO disabled Receiver FIFO reset: LPC: w 1: Bytes in receiver FIFO and counter are reset. Shift register is not reset (bit is self- clearing) 0: No effect ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 136: Line Control Register (Lcr)

    Table 6-35 Line Control Register (LCR) LPC IO Address: Base + 3 Description Default Access Serial character WORD length: LPC: r/w 00: 5 bits 01: 6 bits 10: 7 bits 11: 8 bits ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 137 3 and 5 are set and bit 4 is cleared, the parity bit is transmitted and checked as set. If bit 5 is cleared, stick parity is disabled: 1: Stick parity enabled 0: Stick parity disabled ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 138: Modem Control Register (Mcr)

    LPC: r/w 1: DTR# output in low (active) state 0: DTR# output in high state Request to send (RTS#) output control: LPC: r/w 1: RTS# output in low (active) state 0: RTS# output in high state ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 139: Line Status Register (Lsr)

    Line Status Register (LSR) This register provides status information to the processor concerning the data transfers. Bits 5 and 6 show information about the transmitter. The rest of the bits contain information about the receiver. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 140: Table 6-37 Line Status Register (Lsr)

    RBR or the FIFO. DR is cleared by reading all of the data in the RBR or the FIFO: 1: New data received 0: No new data ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 141 FIFO to which it applies. This error is revealed to the CPU when its associated character is at the top of the FIFO: 1: Parity error occurred 0: No parity error ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 142 FIFO. The next character transfer is enabled after RXD goes to the marking state for at least two Receiver CLK samples and then receives the next valid start bit: 1: Full WORD transmission time exceeded 0: Normal operation ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 143 FIFO. It is cleared when the microprocessor reads the LSR and there are no subsequent errors in the FIFO. If FIFO is not used, bit always reads 0: 1: FIFO data error encountered 0: No FIFO error encountered ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 144: Modem Status Register (Msr)

    CPU. When DDSR is set and the modem status interrupt is enabled, a modem status interrupt is generated: 1: Change in state of DSR# input since last read 0: No change in state of DSR# input since last read ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 145 Complement of the data carrier detect Ext. LPC: r (DCD#) input When the ACE is in the diagnostic test mode (LOOP [MCR4] = 1), this bit is equal to the MCR bit 3 (OUT2#). Not supported. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 146: Scratch Register (Scr)

    The baud rate of the data shifted in/out of the UART is given by: Baud Rate = UART_CLK / (16X Divisor) For example, if the pre-divider is 26 the UART_CLK is 1.8461538MHz. When the divisor is 12, the baud rate is 9600. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 147: Fpga Register Mapping

    Address Offset. An LPC I/O write-access to an address not listed in this table or marked with a "-" in the LPC I/O column is ignored. A corresponding read access delivers always zero. Note: LPC I/O Address = 0x600 + Address Offset ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 148: Ipmc Spi Register Map

    Payload Reset Source for IPMC Register 0x15 Payload Reset Source for BIOS Register 0x16 Payload Reset Source for OS Register 0x17 IPMC Watchdog Timeout Register For LPC I/O access, add the LPC I/O Base Address 0x600 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 149 Debug Switch and LED Status Register 0x5A CPU Error Status Register 0x5B Cave Creek Module Status and Control Register 0x5C ACPI Status and Control Register For LPC I/O access, add the LPC I/O Base Address 0x600 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 150: Module Identification Register

    IPMC Scratch Register 1. 0x7F POST Code Register For LPC I/O access, add the LPC I/O Base Address 0x600 6.3.3 Module Identification Register The Module Identification Registers identifies the ATCA-7370. Table 6-43 Module Identification Register Address Offset: 0x00 Description Default Access...

  • Page 151: Version Register

    0: COM1 not used for serial redirection IPMC: r 1: COM1 used for serial redirection COM2 use for serial redirection LPC: r/w 0: COM2 not used for serial redirection IPMC: r 1: COM2 used for serial redirection Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 152: Sol Control Register

    00: COM1 to Faceplate and COM2 to RTM IPMC: r/w 01: COM1 to RTM and COM2 to Faceplate LPC: r 10: BMC to Faceplate and COM2 to RTM 11: BMC to Faceplate and COM1 to RTM ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 153: Ipmc Power Level Register

    IPMC Power Level. IPMC writes a value, which 0x00 IPMC: r/w represents a defined power level. LPC: r Whenever the IPMC writes and data into this register, it should also produce an 8 ms negative pulse on FPGA_PCH_GPIO5 to notify payload. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 154: Payload Power Control Register

    0: Payload power off Reserved 6.3.10 I2C Switch Control Register Table 6-50 I2C Switch Control Register Address Offset: 0x08 Description Default Access FPGA_SPD_MUX_S[0] IPMC: r/w LPC: r FPGA_SPD_MUX_S[1] IPMC: r LPC: r/w FPGA_PCH_I2C_SEL IPMC: r/w LPC: r Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 155: Payload Power-Button Register

    Address Offset: 0x0F Description Default Access Reserved Reserved Enable front board push button reset LPC: r/w payload IPMC: r 1: enabled 0: disabled Enable IPMC reset payload LPC: r 1: enabled IPMC: r/w 0: disabled ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 156: Reset Function Register

    If a cold-reset is on going, a warm-reset request will be ignored. Table 6-53 Reset Function Register Address Offset: 0x10 Description Default Access Reserved Reserved Select the function of front board push LPC: r/w button payload request IPMC: r 1: Warm-reset 0: Cold-reset ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 157: Ipmc Reset Payload Request Register

    If related bit in reset mask register is high, a warm or cold reset will occur based on reset function register bit. Table 6-54 IPMC Reset Payload Request Register Address Offset: 0x11 Description Default Access Writing magic word 0x55 will cause a reset IPMC: w request ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 158: Bios Reset Payload Request Register

    Table 6-56 OS Reset Payload Request Register Address Offset: 0x13 Description Default Access Writing magic word 0x5A will cause a reset LPC: w request ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 159: Payload Reset Source For Ipmc Register

    The same situation will happen if two reset sources go active at the same time. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 160: Payload Reset Source For Os Register

    If more than one reset occurs from different sources without clearing the corresponding register bits, one cannot determine the most recent reset source since more than one bit will be set. The same situation will happen, if two reset sources go active at the same time. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 161: Table 6-59 Payload Reset Source For Os Register

    RTM push button reset payload request LPC: r/w1c 1: Reset occurred FPGA Watchdog reset payload request LPC: r/w1c 1: Reset occurred BIOS reset payload request LPC: r/w1c 1: Reset occurred OS reset payload request LPC: r/w1c 1: Reset occurred ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 162: Ipmc Watchdog Timeout Register

    Table 6-61 IPMC Watchdog Timeout for BIOS Register Address Offset: 0x18 Description Default Access IPMC Watchdog Timeout LPC: r/w1c 1: IPMC Watchdog Timeout occurred IPMC Watchdog Pre-Timeout LPC: r/w1c 1: IPMC Watchdog Pre-Timeout occurred Reserved 000000 LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 163: 11Ipmc Watchdog Timeout For Os Register

    Watchdog will be cleared during power-up reset and cold reset. Table 6-63 FPGA-Payload-Watchdog Threshold Low-byte Register Address Offset: 0x1A Description Default Access Low byte of timeout threshold for FPGA- 0xFF LPC: r/w Payload-Watchdog, unit is one msec ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 164: 13Fpga Payload Watchdog Clear Register

    Writing and other data will enable and restart the FPGA- IPMC-Watchdog. Table 6-66 FPGA-IPMC-Watchdog Threshold Register Address Offset: 0x1F Description Default Access Timeout threshold the 'FPGA-IPMC- IPMC: r/w Watchdog', unit is one second. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 165: Flash Control Register

    1: Recovery Boot Flash linked to PCH, Default one to IPMC 6.3.14 RTM Status and Control Register Table 6-68 RTM Status and Control Register Address Offset: 0x4A Description Default Access RTM_PS1_N Ext. RTM_ALL_PG Ext. RTM_MP_PG Ext. RTM_PP_PG Ext. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 166: Blue Led Status And Control Register

    0: Software control Blue LED with bit1~0 IPMC: r/w setting in this register. 1: FPGA control Blue LED according to handle status (long blinking if handle is closed or solid on if it is open). Reserved 00000 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 167: User Led Status And Control Register

    Control user LED #2 red color output Signal LPC: r/w LED_USER2_RED_N: IPMC: r 0: LED_USER2_RED_N is driven high. 1: LED_USER2_RED_N is driven low. Control BI LED enable output Signal LED_BI_EN_N: 0: LED_BI_EN_N is driven high. 1: LED_BI_EN_N is driven low. Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 168: Miscellaneous Status And Control Register

    Note: FPGA_PCH GPIO3 signal will also be controlled by warm-reset procedure 6.3.18 Debug Switch and LED Status Register Table 6-72 Debug Switch and LED Status Register Address Offset: 0x59 Description Default Access DBG_SW[3:0] Ext. FPGA_DBG_LED_N[3:0] Ext. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 169: Scratch Register

    Table 6-74 POST Code Register Address Offset: 0x7F Description Default Access POST codes from host 0x00 IPMC: r Standard Status Codes Table 6-75 Component Status Codes Status Code Code Symbol 0x20 POSTCODE_CC_VARIABLE_SERVICES 0x21 POSTCODE_CC_KEYBOARD_CONTROLLER 0x22 POSTCODE_CC_BOOT_MODE 0x23 POSTCODE_CC_S3_SUPPORT ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 170 POSTCODE_CC_INTERRUPT_CONTROLLER 0x2E POSTCODE_CC_DIAGNOSTIC_SUMMARY 0x2F POSTCODE_CC_SMBIOS 0x30 POSTCODE_CC_SMM_COMMUNICATION 0x31 POSTCODE_CC_SMM_RUNTIME 0x32 POSTCODE_CC_SMM_SERVICES 0x33 POSTCODE_CC_FIRMWARE_DEVICE 0x34 POSTCODE_CC_CAPSULE_SERVICES 0x35 POSTCODE_CC_MONOTONIC_COUNTER 0x36 POSTCODE_CC_SMBIOS_EVENT_LOG 0x37 POSTCODE_CC_RTC 0x38 POSTCODE_CC_BOOT_MANAGER 0x39 POSTCODE_CC_VGA 0x3A POSTCODE_CC_HII_FORMS_BROWSER 0x3B POSTCODE_CC_BOOT_MENU 0x3C POSTCODE_CC_USER_MANAGER 0x3D POSTCODE_CC_TIMER 0x3E POSTCODE_CC_PCI_BUS ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 171 POSTCODE_CC_EHCI 0x49 POSTCODE_CC_XHCI 0x4A POSTCODE_CC_UHCI 0x4B POSTCODE_CC_OHCI 0x4C POSTCODE_CC_USB_KEYBOARD 0x4D POSTCODE_CC_USB_MOUSE 0x4E POSTCODE_CC_USB_MASS_STORAGE 0x4F POSTCODE_CC_CONSOLE_SPLITTER 0x50 POSTCODE_CC_GRAPHICS_CONSOLE 0x51 POSTCODE_CC_SERIAL_CONSOLE 0x52 POSTCODE_CC_TEXT_CONSOLE 0x53 POSTCODE_CC_DISK_IO 0x54 POSTCODE_CC_PARTITION 0x55 POSTCODE_CC_SETUP 0x56 POSTCODE_CC_LEGACY_BIOS 0x57 POSTCODE_CC_BLOCK_IO_THUNK 0x58 POSTCODE_CC_CRYPTO 0x59 POSTCODE_CC_XHCI_RESET ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 172: Table 6-76 Progress Status Codes

    0xD1 POSTCODE_CC_FLASH_CONTROLLER 0xD2 POSTCODE_CC_FLASH_DEVICE 0xD3 POSTCODE_CC_FINGERPRINT_SENSOR 0xD4 POSTCODE_CC_CLOCK_CONTROLLER 0xD5 POSTCODE_CC_EMBEDDED_CONTROLLER 0xD6 POSTCODE_CC_SERIAL_CONTROLLER Table 6-76 Progress Status Codes Status Code Code Symbol 0x01 POSTCODE_PC_COMP_PEI_BEGIN 0x02 POSTCODE_PC_COMP_PEI_END 0x03 POSTCODE_PC_COMP_DXE_BEGIN 0x04 POSTCODE_PC_COMP_DXE_END 0x05 POSTCODE_PC_COMP_SUPPORTED 0x06 POSTCODE_PC_COMP_START 0x07 POSTCODE_PC_COMP_STOP ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 173: Table 6-77 Architectural Status Codes

    Status Code Code Symbol 0xE0 POSTCODE_PC_SEC_ENTRY 0xE1 POSTCODE_PC_SEC_EXIT 0xE2 POSTCODE_PC_PEI_ENTRY 0xE3 POSTCODE_PC_PEI_EXIT 0xE4 POSTCODE_PC_IPL_DXE 0xE5 POSTCODE_PC_IPL_S3 0xE6 POSTCODE_PC_S3_OS 0xE7 POSTCODE_PC_IPL_RECOVERY 0xE8 POSTCODE_PC_IPL_EXIT 0xE9 POSTCODE_PC_DXE_ENTRY 0xEA POSTCODE_PC_DXE_EXIT 0xEB POSTCODE_EC_PEI_MEMORY 0xEC POSTCODE_EC_PEI_IPL 0xED POSTCODE_EC_IPL_DXE 0xEE POSTCODE_EC_IPL_PPI 0xEF POSTCODE_EC_DXE_ARCH ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 174 Maps and Registers ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 175: Serial Over Lan

    You can configure the SOL parameters using the standard IPMI commands or via an open source tool called ipmitool. Installing the ipmitool You can download the latest version of ipmitool from http://ipmitool.sourceforge.net. Documentation for this tool is also available on this site. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 176: Configuring Sol Parameters

    You can use standard IPMI commands or the ipmitool to modify the parameters. 7.3.1 Using Standard IPMI Commands This example shows how to set up the SOL configuration parameter with standard IPMI commands. ipmicmd is used on the local IPMC and the IP is configured. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 177: Using Ipmitool

    SOL session for base 1(channel 1) and base 2(channel 2): root@localhost:~# ipmitool lan print 1 Set in Progress : Set Complete Auth Type Support Auth Type Enable : Callback : : User : Operator : : Admin ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 178 : User : Operator : : Admin : OEM IP Address Source : Unspecified IP Address : 172.17.1.220 Subnet Mask : 255.255.0.0 MAC Address : 00:00:00:00:00:00 Default Gateway IP : 172.17.0.1 Default Gateway MAC : 00:00:00:00:00:00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 179: Establishing A Sol Session

    2. Compile and install the ipmitool on your target which is destined for opening the SOL session on the ATCA-7370. For details refer to Installing the ipmitool on page 175. 3. Apply an IP address to the ATCA-7370 SOL interface. For details refer to Configuring SOL Parameters on page 176.
  • Page 180 Serial Over LAN 6. Start ATCA-7370 SOL session on your target with the ipmitool and the configured IP address for the ATCA-7370 SOL interface. ipmitool -C 1 -I lanplus -H 172.16.0.221 -U soluser -P solpasswd -k gkey sol activate For details on the command parameters, refer to the ipmitool documentation available at http://ipmitool.sourceforge.net.

  • Page 181: Supported Ipmi Commands

    Set BMC Global Enables 0x06/0x07 0x2E Get BMC Global Enables 0x06/0x07 0x2F Clear Message Flags 0x06/0x07 0x30 Get Message Flags 0x06/0x07 0x31 Get Message 0x06/0x07 0x33 Send Message 0x06/0x07 0x34 Set Channel Access 0x06/0x07 0x40 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 182: Bmc Watchdog Commands

    2 sensor. The options of pre-timeout and power-cycle are not supported. Table 8-3 Supported Watchdog Commands Command NetFn (Request/Response) Reset Watchdog Timer 0x06/0x07 0x22 Set Watchdog Timer 0x06/0x07 0x24 Get Watchdog Timer 0x06/0x07 0x25 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 183: Sel Device Commands

    Set SEL Time 0x0A/0x0B 0x49 8.1.5 FRU Inventory Commands Table 8-5 Supported FRU Inventory Commands NetFn Command (Request/Response) Get FRU Inventory Area Info 0x0A/0x0B 0x10 Read FRU Data 0x0A/0x0B 0x11 Write FRU Data 0x0A/0x0B 0x12 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 184: Sensor Device Commands

    0x2D Get Sensor Type 0x04/0x05 0x2F 8.1.7 Chassis Device Commands Table 8-7 Supported Chassis Device Commands Command NetFn (Request/Response) Chassis Control 0x00/0x01 0x02 Set System Boot Options 0x00/0x01 0x08 Get System Boot Options 0x00/0x01 0x09 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 185: System Boot Options Commands

    The following table lists which boot properties can be configured and the corresponding boot parameter number. Table 8-8 Configurable System Boot Option Parameters Corresponding Boot Parameter Configurable Boot Property Number Selection between BIOS and FPGA boot POST Type Timeout for graceful shutdown BIOS boot parameters ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 186: Table 8-9 System Boot Options Parameter #96

    Supported IPMI Commands 8.1.7.1.1 System Boot Options Parameter #96 This boot parameter is an Artesyn-specific OEM boot parameter as defined in the following table. Table 8-9 System Boot Options Parameter #96 Data Byte Description 1 Bits 7..2: Reserved Bit 1: FPGA configuration stream load...

  • Page 187: Table 8-10 System Boot Options Parameter #97

    Supported IPMI Commands 8.1.7.1.2 System Boot Options Parameter #97 This is an Artesyn-specific OEM parameter as defined in the following table. Table 8-10 System Boot Options Parameter #97 Data Byte Description POST Type Data 1 - Set Selector. This is the processor ID for which the boot option is to be set.

  • Page 188: Table 8-11 System Boot Options Parameter #98

    IPMC, interprets them and executes the boot process accordingly. Note that the boot options stored in the IPMC have higher priority than that stored in the local area of the boot firmware itself. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 189: Figure 8-1 System Boot Options Parameter #100 - Information Flow

    Details are given below. The following figure explains the basic information flow related to the system boot options parameter #100. Figure 8-1 System Boot Options Parameter #100 - Information Flow ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 190: Table 8-12 System Boot Options - Parameter #100 - Data Format

    Parameter Selector [7] - 1b = the storage area is locked. 0b = the storage area is unlocked [6:0] - parameter selector (must be 100). Set Selector 0h = user area All other values are reserved. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 191: Table 8-14 System Boot Options Parameter #100 - Get Command Usage

    [6:0] - parameter selector (must be 100). Set Selector 0h = user area 1h = default area All other values are reserved. Block Selector Offset into the storage area of the boot options in multiples of 16 bytes. Response Data ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 192 This is supported by HPI, for details refer to the System Management Interface Based on HPI-B User’s Guide related to your system environment. The following table lists the boot parameters that can be configured for the ATCA-7370 blade using the system boot option parameter #100.

  • Page 193: Table 8-15 System Boot Options Parameter #100 - Supported Parameters

    2400 en_cmp all:1:2:3:4:5:6:7 en_ht on:off flexratio on:off ratio_value numeric(12~30) en_xd on:off virtualization on:off speedstep on:off turbo_mode on:off c_states on:off vtd_support on:off clk_spreadspec on:off artm_pwr_policy on:off ddr3_refresh auto:7.8:3.9 auto ddr3_vdd_limit auto:1.5 auto ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 194: Table 8-16 Boot_Order Devices

    Table 8-16 boot_order Devices Device Description sashdd SAS HDD mounted on the RTM frontnet Front Panel Network basenet0 Base0 Network basenet1 Base1 Network usb1 USB frontpanel 1 usb2 USB frontpanel 2 usbartm USB artm usbcdrom USB cdrom ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 195: Event Commands

    LAN Device Commands Table 8-18 Supported LAN Device Commands Command NetFn (Request/Response) Set LAN Configuration Parameters 0x0C/0x0D 0x01 Get LAN Configuration Parameters 0x0C/0x0D 0x02 Set SOL Configuration Parameters 0x0C/0x0D 0x21 Get SOL Configuration Parameters 0x0C/0x0D 0x22 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 196: Picmg 3.0 Commands

    Supported IPMI Commands PICMG 3.0 Commands The Artesyn Embedded Technologies IPMC is a fully compliant AdvancedTCA Intelligent Platform Management Controller. It supports all required and mandatory AdvancedTCA commands as defined in the PICMG 3.0 R3.0 specification and AMC.0 R2.0 specification.
  • Page 197 0x37 Initiate manual rollback 0x2C/0x2D 0x38 The firmware upgrade commands supported by the blade are implemented according to the PICMG HPM.1 Revision 1.0 specification. The boot block can be updated with PICMG HPM.1 specific commands. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 198: Artesyn Embedded Technologies Specific Commands

    Commands The Artesyn Embedded Technologies IPMC supports several commands which are not defined in the IPMI or PICMG 3.0 specification but are introduced by Artesyn Embedded Technologies: serial output commands. Before sending any of these commands, the shelf management software must check ...

  • Page 199: Set Feature Configuration Command

    This command can be used to set the IPMI feature. Table 8-21 Set Feature Configuration Command Byte Data Field Request Data Artesyn IANA Number (0065CDh). LSB first. Feature Selector. For details, please see Table "Feature Selector Assignments" on page 200...

  • Page 200: Serial Output Commands

    Byte Data Field Response Data Completion Code. Generic plus the following command-specific completion codes: 80h = feature selector not supported. Artesyn IANA Number (0065CDh). LSB first. Feature Configuration Persistency / Duration Table 8-23 Feature Selector Assignments Feature Selector Description Boot Firmware Automatic Switchover Function Enable/Disable 8.3.2...

  • Page 201: Set Serial Output Command

    Output command. Table 8-25 Set Serial Output Command Byte Data Field Request Data Artesyn IANA Number (0065CDh). LSB first. Serial connector type: 0 = Front panel connector 1 = Backplane connector All other values are reserved. Serial connector instance number, a value of 00h shall be used all other values are reserved Serial output selector.

  • Page 202: Oem Set/Get Acpi Power Commands

    Table 8-26 Get Serial Output Command Byte Data Field Request Data Artesyn IANA Number (0065CDh). LSB first. Serial connector type: 0 = Front panel connector 1 = Backplane connector All other values are reserved. Serial connector instance number. A value of 00h shall be used all other...

  • Page 203: Oem Set Acpi Power State (0X17)

    Data Byte Field Request Data LSB of Artesyn IANA Enterprise Number. A value of CDh shall be used. 2nd byte of Artesyn IANA Enterprise Number. A value of 65h shall be used. MSB of Artesyn IANA Enterprise Number. A value of 00h shall be used.

  • Page 204: Oem Set/Get Performance Commands

    Table 8-29 OEM Get ACPI Power State Command Byte Data Field Request Data LSB of Artesyn IANA Enterprise Number. A value of CDh shall be used. 2nd byte of Artesyn IANA Enterprise Number. A value of 65h shall be used.

  • Page 205: Oem Set Performance Mode (0X21)

    LSB of NSN IANA Enterprise Number. A value of 2Ah shall be used. 2nd byte of NSN IANA Enterprise Number. A value of 6Fh shall be used. MSB of NSN IANA Enterprise Number. A value of 00h shall be used. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 206: Oem Get Performance Mode (0X22)

    --0h normal performance mode --1h reduced performance mode Power draw value of reduced performance mode, the unit is watt, LS byte first. Power draw value of normal performance mode, the unit is watt, LS byte first. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 207: Pigeon Point Specific Commands

    Table 8-52 on page 223 0x2E/0x2F 0x16 Get Module State Table 8-53 on page 223 0x2E/0x2F 0x27 Enable Module Site Table 8-54 on page 225 0x2E/0x2F 0x28 Disable Module Site Table 8-55 on page 225 0x2E/0x2F 0x29 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 208: Get Status Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 209 Bits [0:3] Metallic Bus 1 Events These bits indicate pending Metallic Bus 1 requests arrived from the shelf manager: 0: Metallic Bus 1 Query 1: Metallic Bus 1 Release 2: Metallic Bus 1 Force 3: Metallic Bus 1 Free ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 210 Bits [0:3] Clock Bus 3 Events These bits indicate pending Clock Bus 3 requests arrived from the shelf manager: 0: Clock Bus 3 Query 1: Clock Bus 3 Release 2: Clock Bus 3 Force 3: Clock Bus 3 Free ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 211: Get Serial Interface Properties Command

    Bits [6:4] Reserved Bits [3:0] Baud Rate ID The baud rate ID defines the interface baud rate as follows: 0: 9600 bps 1: 19200 bps 2: 38400 bps 3: 57600 bps (unsupported) 4: 115200 bps (unsupported) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 212: Set Serial Interface Properties Command

    3: 57600 bps (unsupported) 4: 115200 bps (unsupported) Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 213: Get Debug Level Command

    Bit [1] Low-level Error Logging Enable If set to "1", the IPMC outputs low-level error/diagnostic messages onto the serial debug interface. Bit [0] Error Logging Enable If set to "1", the IPMC outputs error/diagnostic messages onto the serial debug interface. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 214: Set Debug Level Command

    Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 215: Get Hardware Address Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Hardware Address If set to 00, the ability to override the hardware address is disabled. NOTE: A hardware address change only takes effect after an IPMC reset. Response Data Completion Code ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 216: Get Handle Switch Command

    LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 Handle Switch Status 0x00: The handle switch is open. 0x01: The handle switch is closed. 0x02: The handle switch state is read from hardware. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 217: Set Handle Switch Command

    Byte Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 218: Set Payload Communication Time-Out Command

    0.1 to 25.5 seconds. Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 219: Enable Payload Control Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 220: Reset Ipmc Command

    Byte Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 221: Graceful Reset Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 222: Get Payload Shutdown Time-Out Command

    Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 Time-Out measured in hundreds of milliseconds, LSB first ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 223: Set Payload Shutdown Time-Out Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Module Site ID Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 224 0: Payload power is bad. 1: Payload power is good. Bit [6] 0: IPMB-L buffer is not attached. 1: IPMB-L buffer is attached. Bit [7] 0: IPMB-L buffer is not ready. 1: IPMB-L buffer is ready. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 225: Enable Module Site Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Module Site ID Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 226: Reset Carrier Sdr Repository Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 227: Fru Information And Sensor Data Records

    Defined by AMC.0 R2.0 Spec Record PICMG Carrier Activation Defined by AMC.0 R2.0 Spec and Current Management PICMG Carrier Point-to- Defined by AMC.0 R2.0 Spec Point Connectivity Record PICMG AMC Point-to- Defined by AMC.0 R2.0 Spec Point Connectivity ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 228: Power Configuration

    Early Power Draw Levels, Watt Complete early power level including IPMC Steady state Power Draw Levels, 1 = 120W Complete steady power Watt consumption including IPMC 2 = 170W 3=200W Transition from early to steady levels, sec ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 229: Figure 9-1 Atca-7370 Temperature Sensors

    FRU Information and Sensor Data Records The following figure shows the locations of all temperature sensors available on-board. Figure 9-1 ATCA-7370 Temperature Sensors ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 230: Figure 9-2 Atca-7370-S Temperature Sensors

    ATCA-7370-S Temperature Sensors Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 231: Sensor Data Records

    [3:0] = Previous State 0x1: M1 discrete 0x2: M2 0x6F 0x3: M3 0x4: M4 0x5: M5 0x6: M6 0x7: M7 -48V A Volts Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 232 0x01 HoldUp Volts Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 Input Power Other Units- Threshold reading threshold unr uc unc Asrt / Deass Auto based 0x01 Sensor 0x0B ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 233 Asrt / Deass Auto 0x01 0x01 Outlet Temp Temp Threshold reading threshold unr uc unc Asrt / Deass Auto 0x01 0x01 Board Temp Temp Threshold reading threshold unr uc unc Asrt / Deass Auto 0x01 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 234 Asrt / Deass Auto 0x01 0x01 DDR 2 Temp Temp Threshold reading threshold unr uc unc Asrt / Deass Auto 0x01 0x01 DDR 3 Temp Temp Threshold reading threshold unr uc unc Asrt / Deass Auto 0x01 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 235 Asrt / Deass Auto 0x02 0x01 VTT CPU Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 VSA CPU Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 236 0x3: IPMB-A enabled, IPMB-B enabled Watchdog 2 Sensor- See IPMI Spec 0xFF 0x0: Timer expired Asrt Auto Watchdog specific 0x23 0x1: Hard Reset discrete 0x2: Power Down 0x6F 0x3: Power Cycle 0x8: Timer Interrupt ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 237 0x1: Firmware or software change 0x6F 0x2: Hardware incompatibility 0x3: Firmware or software incompatibility 0x4: Entity is of an invalid hardware version 0x5: Entity contains invalid F/W,software 0x6: Hardware Change successful 0x7: Software or F/W change successful. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 238 0xFF 0xFF 0x0: A: boot Asrt Auto specific completed 0x1F discrete 0x1: C: boot completed 0x6F 0x2: PXE boot completed 0x3: Diagnostic boot completed 0x4: CD_ROM boot completed 0x5: ROM boot completed 0x6: boot completed ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 239 0xFF 0xFF 0x0: Initiated by Asrt Auto Boot specific power up Initiated discrete 0x1: Initiated by 0x1D hard reset 0x6F 0x2: Initiated by warm reset 0x3: User requested PXE boot 0x4: Automatic boot to diagnostic ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 240 0x2: Power Failure 0x3: Hard Boot 0x4: Cold Boot 0x5: Warm Boot 0x6: Reserved Power Good Power Sensor- See IPMI Spec 0xFF 0x0: Presence Asrt Auto Supply specific detected 0x08 discrete 0x1: Power Supply Failure detected 0x6F ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 241 [3] = IPMC reset payload req. [2] = Pus Button Reset front [1] = reserved [0] = Payload Power- on reset CPU Status Processor Sensor- 0xFF 0xFF 0x1: Thermal Trip Asrt Auto specific 0x07 0xA: ProcHot discrete 0x6F ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 242 Type Byte 1 Event Data Byte 2 Event Data Byte 3 Description Deassertion Rearm ACPI State System Sensor- 0xFF 0xFF 0x0: S0 Asrt Auto ACPI Power specific 0x3: S3 State discrete 0x5: S5 0x22 0x6F ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 243: Firmware Upgrade

    10.1 HPM.1 Firmware Upgrade 10.1.1 Overview The primary update mechanism for the ATCA-7370 blades is the Firmware Upgrade Command line Utility (FCU) tool which is delivered with the BBS package for the board. However, the ATCA-7370 board family also supports upgrade of the firmware with the HPM.1 specification.

  • Page 244: Interface

    The IPMI over LAN interface uses the BASE Ethernet controller to do firmware upgrades. The interface has to be configured before the first use. Configuring this interface is described in Chapter 7, Configuring SOL Parameters, on page 176. Example: ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 245: Ipmc Upgrade

    The boot loader manages both; active and backup firmware partitions. It is responsible for detecting if the active firmware is invalid or has failed. If the active firmware failed or is invalid, the boot loader will switch to the ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 246: Bios/Fpga Update

    Both BIOS and FPGA boot banks can be upgraded with HPM.1. IPMC support automatic boot bank switching, which is mandatory for HPM.1 to activate. The newly upgrade firmware can be activated with a payload power cycle if you upgraded the firmware with activate option. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 247: Figure 10-2 Spi Busses Connection

    Figure 10-2 SPI Busses Connection Both BIOS and FPGA upgrade may last from fifteen minutes up to two hours. The time varies with the selected programming interface. A power cycle is required after the BIOS/FPGA update. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 248: Upgrade Package

    Description atca7370_em_bios_xx_yy_zzzz.hpm Contains BIOS HPM.1 image with version xx_yy_zzzz atca7370_em_fpga_xx_yy_zzzz.hpm Contains FPGA HPM.1 image with version xx_yy_zzzz atca7370_em_ibbl_ xx_yy_zzzz.hpm Contains IPMC boot loader image with version xx_yy_zzzz atca7370_em_ipmc_ xx_yy_zzzz.hpm Contains IPMC firmware with version xx_yy_zzzz ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 249: Replacing The Battery

    The battery provides data retention of seven years summing up all periods of actual data use. Artesyn Embedded Technologies therefore assumes that there is usually no need to replace the battery except, for example, in case of long-term spare part handling.

  • Page 250: Figure A-1 Location Of On-Board Battery

    Replacing the Battery Some blade variants contain an on-board battery. Its location is shown in the following figure. Figure A-1 Location of On-board Battery ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 251 Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent this damage, do not use a screw driver to remove the battery from its holder. 2. Install the new battery following the "positive" and "negative" signs. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 252 Replacing the Battery ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 253: Troubleshooting

    Make sure the temperature is high. as per the board requirements. There is a fault in the DC Verify the DC converter. converter. The IP address of the blade is Verify the IP address of the incorrect. blade. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 254 Troubleshooting ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)

  • Page 255: Related Documentation

    The publications listed below are referenced in this manual. You can obtain electronic copies of Artesyn Embedded Technologies - Embedded Computing publications by contacting your local Artesyn sales office. For released products, you can also visit our Web site for the latest copies of our product documentation.
  • Page 256 Related Documentation ATCA-7370/ATCA-7370-S Installation and Use (6806800P54L)
  • Page 258 Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners. © 2017 Artesyn Embedded Technologies, Inc.

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