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Artesyn MVME2502 Manuals
Manuals and User Guides for Artesyn MVME2502. We have
2
Artesyn MVME2502 manuals available for free PDF download: Installation And Use Manual
Artesyn MVME2502 Installation And Use Manual (164 pages)
Brand:
Artesyn
| Category:
Single board computers
| Size: 10 MB
Table of Contents
Table of Contents
3
List of Figures
13
About this Manual
15
Safety Notes
21
Sicherheitshinweise
25
1 Introduction
31
Overview
31
Standard Compliances
33
Table 1-1 Board Standard Compliances
33
Figure 1-1 MVME2502 Declaration of Conformity
34
Mechanical Data
35
Ordering Information
35
Table 1-3 Accessories and Cables
35
Table 1-4 Accessories and Cables
36
Product Identification
37
Figure 1-2 Serial Number Location-ENP1 Variant
37
Figure 1-3 Serial Number Location-ENP2 Variant
38
2 Hardware Preparation and Installation
39
Overview
39
Unpacking and Inspecting the Board
40
Requirements
41
Environmental Requirements
41
Table 2-1 Environmental Requirements
41
Power Requirements
42
Table 2-2 Power Requirements
42
Equipment Requirements
43
Configuring the Board
43
Installing Accessories
44
Rear Transition Module
44
PMC/XMC Support
45
Installation of MVME2502-HDMNTKIT1/MVME2502-HDMNTKIT2
47
Installing and Removing the Board
49
Completing the Installation
51
3 Controls, Leds, and Connectors
53
Board Layout
53
Figure 3-1 Board Layout ENP1 Variant
53
Figure 3-2 Board Layout ENP2 Variant
54
Front Panel
55
Figure 3-3 Front Panel Leds, Connectors and Switches
55
Reset Switch
56
Leds
56
Front Panel Leds
56
Table 3-1 Front Panel Leds
57
On-Board Leds
58
Table 3-2 On-Board Leds Status
58
Connectors
59
Front Panel Connectors
59
RJ45 with Integrated Magnetics (J1)
59
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1)
59
Front Panel Serial Port (J4)
61
Table 3-4 Front Panel Serial Port (J4)
61
USB Connector (J5)
61
Table 3-6 Vmebus P1 Connector
62
Vmebus P1 Connector
62
Table 3-7 Vmebus P2 Connector
64
Vmebus P2 Connector
64
On-Board Connectors
65
SATA Connector (J3)
65
Table 3-8 Custom SATA Connector (J3)
65
PMC Connectors
66
Table 3-9 PMC J11/J111 Connector
66
Table 3-10 PMC J12/J222 Connector
68
Table 3-11 PMC J13/J333 Connector
69
Table 3-12 PMC J14 Connector
70
JTAG Connector (P6)
72
COP Connector P50(15)
73
Table 3-15 XMC Connector (XJ1) Pin out
74
XMC Connector (XJ1)
74
Table 3-16 XMC Connector (XJ2) Pin out
75
XMC Connector (XJ2)
75
Miscellaneous P2020 Debug Connectors(P4)
76
Table 3-17 P2020 Debug Header (P4)
76
Switches
77
Geographical Address Switch (S1)
77
Figure 3-6 Geographical Address Switch
78
Table 3-18 Geographical Address Switch
78
Figure 3-7 SMT Configuration Switch Position
79
SMT Configuration Switch (S2)
79
Table 3-19 Geographical Address Switch Settings
79
4 Functional Description
81
Block Diagram
81
Chipset
82
E500 Processor Core
82
Integrated Memory Controller
83
PCI Express Interface
83
Duart
84
I2C Interface
84
Local Bus Controller (LBC)
84
Secure Digital Host Controller (SDHC)
84
USB Interface
84
DMA Controller
85
Enhanced Three-Speed Ethernet Controller (Etsec)
85
General Purpose I/O (GPIO)
85
Table 4-1 P2020 GPIO Functions
85
Common On-Chip Processor (COP)
86
Security Engine (SEC) 3.1
86
P2020 Strapping Pins
87
Table 4-2 P2020 Strapping Options
87
System Memory
90
Timers
90
Real Time Clock
90
CPLD Tick Timer
91
P2020 Internal Timer
91
Watchdog Timer
91
Ethernet Interfaces
91
SPI Bus Interface
92
SPI Flash Memory
92
SPI Flash Programming
92
Figure 4-2 SPI Device Multiplexing Logic
94
Firmware Redundancy
94
Crisis Recovery
95
Front UART Control
96
Rear UART Control
96
PMC/XMC Sites
96
PMC Add-On Card
97
XMC Add-On Card
97
SATA Interface
98
VME Support
98
Tsi148 VME Controller
98
Usb
99
I2C Devices
99
Table 4-3 P2020 I2C Port1 Devices
99
Reset/Control CPLD
100
Power Management
100
Table 4-4 P2020 I2C Port2 Devices
100
On-Board Voltage Supply Requirement
101
Power up Sequencing Requirements
101
Table 4-5 Voltage Supply Requirement
101
Clock Structure
102
Figure 4-3 Clock Distribution Diagram
102
Reset Structure
103
Reset Sequence
103
Thermal Management
103
Table 4-6 Thermal Interrupt Threshold
103
Real-Time Clock Battery
104
Debugging Support
104
POST Code Indicator
104
Table 4-7 POST Code Indicator on the LED
104
Figure 4-4 JTAG Chain Diagram
105
JTAG Chain and Board
105
Custom Debugging
106
Rear Transition Module (RTM)
106
Figure 4-5 RTM Block Diagram
106
Table 4-8 Transition Module Features
107
5 Memory Maps and Registers
109
Overview
109
Memory Map
109
Table 5-1 Physical Address Map
109
Flash Memory Map
110
Linux Devices Memory Map
110
Table 5-3 Linux Devices Memory Map
110
Programmable Logic Device (PLD) Registers
112
PLD Revision Register
112
Table 5-4 PLD Revision Register
112
PLD Day Register
113
PLD Month Register
113
PLD Year Register
113
Table 5-6 PLD Month Register
113
PLD Power Good Monitor Register
114
PLD Sequence Register
114
Table 5-8 PLD Sequence Register
114
Table 5-9 PLD Power Good Monitor Register
114
PLD LED Control Register
115
Table 5-10 PLD LED Control Register
115
PLD PCI/PMC/XMC (Slot1) Monitor Register
116
Table 5-11 PLD PCI/PMC/XMC (Slot1) Monitor Register
116
PLD PCI/PMC/XMC (Slot2) Monitor Register
117
Table 5-12 PLD PCI/PMC/XMC (Slot2) Monitor Register
117
PLD Boot Bank Register
119
PLD U-Boot and TSI Monitor Register
119
Table 5-13 PLD U-Boot and TSI Monitor Register
119
Table 5-14 PLD Boot Bank Register
119
PLD Write Protect and I2C Debug Register
121
Table 5-15 PLD Write Protect and I2C Debug Register
121
PLD Test Register 1
122
PLD GPIO2 Interrupt Register
123
PLD Test Register 2
123
Table 5-18 PLD GPIO2 Interrupt Register
123
PLD Shutdown and Reset Control and Reset Reason Register
124
Table 5-19 PLD Shutdown and Reset Control and Reset Reason Register
124
EMMC Reset Register
126
PLD Watchdog Timer Refresh Register
126
Table 5-20 PLD Shutdown and Reset Control and Reset Reason Register
126
Table 5-21 PLD Watchdog Timer Refresh Register
126
PLD Watchdog Control Register
127
PLD Watchdog Timer Count Register
127
Table 5-22 PLD Watchdog Control Register
127
Table 5-23 PLD Watchdog Timer Count Register
127
PLD Watchdog Timer Count Value Register
128
External Timer Registers
128
Prescaler Register
128
Table 5-24 PLD Watchdog Timer Count Register
128
Control Registers
129
Table 5-25 Prescaler Register
129
Compare High and Low Word Registers
130
Counter High and Low Word Registers
131
Table 5-27 Compare High Word Registers
131
Table 5-28 Compare Low Word Registers
131
Table 5-29 Counter High Word Registers
131
Table 5-30 Counter Low Word Registers
132
6 Boot System
133
Overview
133
Accessing U-Boot
133
Boot Options
134
Booting from a Network
134
Booting from a USB Drive
135
Booting from an Optional SATA Drive
135
Booting from an SD Card
136
Booting Vxworks through the Network
136
Using the Persistent Memory Feature
137
MVME2502 Specific U-Boot Commands
138
Table 6-1 MVME2502 Specific U-Boot Commands
138
Updating U-Boot
141
7 Programming Model
143
Overview
143
Reset Configuration
143
Table 7-1 por Configuration Settings
143
Interrupt Controller
147
Table 7-2 MVME2502 Interrupt List
147
I2C Bus Device Addressing
148
Ethernet PHY Address
148
Table 7-3 I2C Bus Device Addressing
148
Table 7-4 PHY Types and MII Management Bus Address
148
Other Software Considerations
149
Mram
149
Quad UART
149
Real Time Clock
149
LBC Timing Parameters
150
Table 7-5 LBC Timing Parameters
150
Clock Distribution
151
Table 7-6 Clock Distribution
151
System Clock
152
Local Bus Controller Clock Divisor
153
Real Time Clock Input
153
Replacing the Battery
155
Figure A-1 Battery Location ENP1 Variant
155
Figure A-2 Battery Location ENP2 Variant
156
Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications
159
B.3 Related Specifications
160
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Artesyn MVME2502 Installation And Use Manual (160 pages)
VME form-factor single-board
Brand:
Artesyn
| Category:
Motherboard
| Size: 10 MB
Table of Contents
Table of Contents
3
List of Figures
13
About this Manual
15
Summary of Changes
18
1 Introduction
19
Overview
19
Table 1-1 Key Features of the MVME2502
19
Standard Compliances
21
Table 1-2 Board Standard Compliances
21
Figure 1-1 MVME2502 Declaration of Conformity
22
Mechanical Data
23
Ordering Information
23
Table 1-4 Accessories and Cables
23
Table 1-5 Accessories and Cables
24
Product Identification
25
Figure 1-2 Serial Number Location-ENP1 Variant
25
Figure 1-3 Serial Number Location-ENP2 Variant
26
2 Hardware Preparation and Installation
27
Overview
27
Unpacking and Inspecting the Board
28
Requirements
28
Environmental Requirements
29
Table 2-1 Environmental Requirements
29
Power Requirements
30
Table 2-2 Power Requirements
30
Equipment Requirements
31
Configuring the Board
31
Installing Accessories
32
Rear Transition Module
32
PMC/XMC Support
33
Installation of MVME2502-HDMNTKIT1/MVME2502-HDMNTKIT2
35
Installing and Removing the Board
37
Completing the Installation
39
3 Controls, Leds, and Connectors
41
Board Layout
41
Figure 3-1 Board Layout ENP1 Variant
41
Figure 3-2 Board Layout ENP2 Variant
42
Front Panel
43
Figure 3-3 Front Panel Leds, Connectors and Switches
43
Reset Switch
44
Leds
44
Front Panel Leds
44
Onboard Leds
46
Table 3-2 Onboard Leds Status
46
Connectors
47
Front Panel Connectors
47
RJ45 with Integrated Magnetics (J1)
47
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1)
47
Front Panel Serial Port (J4)
48
Table 3-4 Front Panel Serial Port (J4)
48
Table 3-6 Vmebus P1 Connector
49
USB Connector (J5)
49
Vmebus P1 Connector
49
Table 3-7 Vmebus P2 Connector
51
Vmebus P2 Connector
51
Onboard Connectors
52
SATA Connector (J3)
52
Table 3-8 Custom SATA Connector (J3)
52
PMC Connectors
53
Table 3-9 PMC J11/J111 Connector
53
Table 3-10 PMC J12/J222 Connector
55
Table 3-11 PMC J13/J333 Connector
56
Table 3-12 PMC J14 Connector
57
JTAG Connector (P6)
59
COP Connector (P6)
60
Table 3-15 XMC Connector (XJ1) Pin out
61
XMC Connector (XJ1)
61
Table 3-16 XMC Connector (XJ2) Pin out
62
XMC Connector (XJ2)
62
Miscellaneous P2020 Debug Connectors
63
Table 3-17 P2020 Debug Header
63
Switches
64
Geographical Address Switch (S1)
64
Figure 3-6 Geographical Address Switch
65
Table 3-18 Geographical Address Switch
65
Figure 3-7 SMT Configuration Switch Position
66
SMT Configuration Switch (S2)
66
Table 3-19 Geographical Address Switch Settings
66
4 Functional Description
69
Block Diagram
69
Chipset
70
E500 Processor Core
70
Integrated Memory Controller
70
I2C Interface
71
Local Bus Controller (LBC)
71
PCI Express Interface
71
Secure Digital Host Controller (SDHC)
71
DMA Controller
72
Duart
72
Enhanced Three-Speed Ethernet Controller (Etsec)
72
General Purpose I/O (GPIO)
72
Table 4-1 P2020 GPIO Functions
72
USB Interface
72
Security Engine (SEC) 3.1
73
Common On-Chip Processor (COP)
74
P2020 Strapping Pins
74
Table 4-2 P2020 Strapping Options
74
System Memory
77
Timers
77
CPLD Tick Timer
78
P2020 Internal Timer
78
Real Time Clock
78
Watchdog Timer
78
Ethernet Interfaces
78
SPI Bus Interface
79
SPI Flash Memory
79
Firmware Redundancy
80
SPI Flash Programming
80
Figure 4-2 SPI Device Multiplexing Logic
81
Crisis Recovery
82
Front UART Control
82
Rear UART Control
83
PMC/XMC Sites
83
PMC Add-On Card
84
XMC Add-On Card
84
SATA Interface
85
VME Support
85
Tsi148 VME Controller
85
Usb
85
I2C Devices
86
Table 4-3 P2020 I2C Port1 Devices
86
Table 4-4 P2020 I2C Port2 Devices
86
Reset/Control CPLD
87
Power Management
87
Onboard Voltage Supply Requirement
87
Table 4-5 Voltage Supply Requirement
87
Power up Sequencing Requirements
88
Clock Structure
89
Reset Structure
89
Figure 4-3 Clock Distribution Diagram
89
Reset Sequence
90
Thermal Management
90
Real-Time Clock Battery
90
Debugging Support
90
Table 4-6 Thermal Interrupt Threshold
90
JTAG Chain and Board
91
POST Code Indicator
91
Table 4-7 POST Code Indicator on the LED
91
Custom Debugging
92
Rear Transition Module (RTM)
93
Table 4-8 Transition Module Features
93
Figure 4-5 RTM Block Diagram
93
5 Memory Maps and Registers
95
Overview
95
Memory Map
95
Flash Memory Map
96
Linux Devices Memory Map
96
Table 5-3 Linux Devices Memory Map
96
Programmable Logic Device (PLD) Registers
98
PLD Revision Register
98
PLD Year Register
98
PLD Day Register
99
PLD Month Register
99
PLD Sequence Register
99
PLD Power Good Monitor Register
100
Table 5-9 PLD Power Good Monitor Register
100
PLD LED Control Register
101
Table 5-10 PLD LED Control Register
101
PLD PCI/PMC/XMC (Slot1) Monitor Register
102
Table 5-11 PLD PCI/PMC/XMC (Slot1) Monitor Register
102
PLD PCI/PMC/XMC (Slot2) Monitor Register
103
Table 5-12 PLD PCI/PMC/XMC (Slot2) Monitor Register
103
PLD U-Boot and TSI Monitor Register
104
Table 5-13 PLD U-Boot and TSI Monitor Register
104
PLD Boot Bank Register
105
Table 5-14 PLD Boot Bank Register
105
PLD Write Protect and I2C Debug Register
106
Table 5-15 PLD Write Protect and I2C Debug Register
106
PLD Test Register 1
107
PLD Test Register 2
108
PLD GPIO2 Interrupt Register
109
Table 5-18 PLD GPIO2 Interrupt Register
109
PLD Shutdown and Reset Control and Reset Reason Register
110
Table 5-19 PLD Shutdown and Reset Control and Reset Reason Register
110
EMMC Reset Register
112
PLD Watchdog Timer Refresh Register
112
Table 5-20 PLD Shutdown and Reset Control and Reset Reason Register
112
Table 5-21 PLD Watchdog Timer Refresh Register
112
PLD Watchdog Control Register
113
PLD Watchdog Timer Count Register
113
Table 5-22 PLD Watchdog Control Register
113
Table 5-23 PLD Watchdog Timer Count Register
113
PLD Watchdog Timer Count Value Register
114
External Timer Registers
114
Prescaler Register
114
Table 5-24 PLD Watchdog Timer Count Register
114
Control Registers
115
Table 5-25 Prescaler Register
115
Compare High and Low Word Registers
116
Counter High and Low Word Registers
117
Table 5-27 Compare High Word Registers
117
Table 5-28 Compare Low Word Registers
117
Table 5-29 Counter High Word Registers
117
Table 5-30 Counter Low Word Registers
118
6 Boot System
119
Overview
119
Accessing U-Boot
119
Boot Options
120
Booting from a Network
120
Booting from a USB Drive
121
Booting from an Optional SATA Drive
121
Booting from an SD Card
122
Booting Vxworks through the Network
122
Using the Persistent Memory Feature
123
MVME2502 Specific U-Boot Commands
124
Table 6-1 MVME2502 Specific U-Boot Commands
124
Updating U-Boot
126
7 Programming Model
129
Overview
129
Reset Configuration
129
Table 7-1 por Configuration Settings
129
Interrupt Controller
133
Table 7-2 MVME2502 Interrupt List
133
I2C Bus Device Addressing
134
Ethernet PHY Address
134
Table 7-3 I2C Bus Device Addressing
134
Table 7-4 PHY Types and MII Management Bus Address
134
Other Software Considerations
135
Mram
135
Quad UART
135
Real Time Clock
135
LBC Timing Parameters
136
Table 7-5 LBC Timing Parameters
136
Clock Distribution
137
Table 7-6 Clock Distribution
137
System Clock
138
Local Bus Controller Clock Divisor
139
Real Time Clock Input
139
Replacing the Battery
141
Figure A-1 Battery Location ENP1 Variant
141
Figure A-2 Battery Location ENP2 Variant
142
Related Documentation
145
Artesyn Embedded Technologies - Embedded Computing Documentation
145
Manufacturers' Documents
146
B.2 Manufacturers' Documents
146
Safety Notes
149
Sicherheitshinweise
153
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