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Artesyn ATCA-7360 Installation And Use Manual

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ATCA-7360
Installation and Use
P/N: 6806800J07S
May 2016

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  • Page 1 ATCA-7360 Installation and Use P/N: 6806800J07S May 2016...
  • Page 2 Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.

  • Page 3: Table Of Contents

    3.2.2 Keys ............... . 71 ATCA-7360 Installation and Use (6806800J07S)
  • Page 4 Advanced -> Super IO Configuration ....... . . 106 ATCA-7360 Installation and Use (6806800J07S)
  • Page 5 4.12.4.7 Correctable Memory Log Disabled ........130 ATCA-7360 Installation and Use (6806800J07S)
  • Page 6 6.3.1 Register Decoding ............155 ATCA-7360 Installation and Use (6806800J07S)
  • Page 7 6.4.12.4 Telecom Status/Control Register ........196 ATCA-7360 Installation and Use (6806800J07S)
  • Page 8 System Boot Options Commands ........221 ATCA-7360 Installation and Use (6806800J07S)
  • Page 9 Artesyn Specific Commands ........
  • Page 10 Related Documentation ............. . 285 Artesyn Embedded Technologies - Embedded Computing Documentation ....285 Manufacturers’...
  • Page 11 Save & Exit ..............114 ATCA-7360 Installation and Use (6806800J07S)
  • Page 12 LPC I/O Register Map Overview ..........156 ATCA-7360 Installation and Use (6806800J07S)
  • Page 13 Version Register ............. . 182 ATCA-7360 Installation and Use (6806800J07S)
  • Page 14 Telecom CH1_CLK1B clock period MSB Register ........208 ATCA-7360 Installation and Use (6806800J07S)
  • Page 15 Set Serial Interface Properties Command ........242 ATCA-7360 Installation and Use (6806800J07S)
  • Page 16 Artesyn MAC Address Descriptor ........
  • Page 17 Interrupt Structure on ATCA-7360 ........
  • Page 18 Figure 6-2 IOH36D PCIe Port mapping on ATCA-7360 ....... . 154 Figure 7-1 SOL Overview .

  • Page 19: About This Manual

    Firmware Upgrade on page 275 provides information on how to upgrade the firmware  components. Replacing the Battery on page 281 provides the battery exchange procedures.  Related Documentation on page 285 provides links to further blade-related  documentation. ATCA-7360 Installation and Use (6806800J07S)
  • Page 20 Field Replaceable Unit Hard Disk Drive Integrated Device Electronics IPMB Intelligent Platform Management Bus IPMC Intelligent Platform Management Controller IPMI Intelligent Platform Management Interface Low Pin Count Media Access Control NEBS Network Equipment Building System ATCA-7360 Installation and Use (6806800J07S)
  • Page 21 Sensor Data Record SDRAM Synchronous Dynamic Random Access Memory SELV Safety Extra Low Voltages Serial Management Interface Serial-over-LAN Serial Presence Detect Serial Peripheral Interface SRAM Static Random Access Memory SROM Serial Read-Only Memory Video Graphics Array ATCA-7360 Installation and Use (6806800J07S)
  • Page 22 Repeated item for example node 1, node 2, ..., node Omission of information from example/command that is not necessary at the time being Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers) Logical OR ATCA-7360 Installation and Use (6806800J07S)
  • Page 23 Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury Indicates a property damage message No danger encountered. Pay attention to important information ATCA-7360 Installation and Use (6806800J07S)

  • Page 24: Table 6-7 Table

    264. Updated Power Requirements on page  6806800J07G August 2010 Updated Appendix A, Replacing the Battery. Added Chapter 10, Firmware Upgrade, on page 275. 6806800J07F January 2010 GA version 6806800J07E November 2009 Updated EA version ATCA-7360 Installation and Use (6806800J07S)

  • Page 25: Table

    "P32 Backplane Connector Pinout - Rows A to D" on page Figure "P32 Backplane Connector Pinout - Rows E to H" on page 86 6806800J07B June 2009 Updated Sensor Data Records on page 264 6806800J07A June 2009 First version ATCA-7360 Installation and Use (6806800J07S)
  • Page 26 About this Manual About this Manual ATCA-7360 Installation and Use (6806800J07S)

  • Page 27: Safety Notes

    The blade has been tested in a standard Artesyn system and found to comply with the limits for a Class A digital device in this system, pursuant to part 15 of the FCC Rules, EN 55022 Class A respectively.
  • Page 28 Damage of Blade and Additional Devices and Modules Incorrect installation of additional devices or modules may damage the blade or the additional devices or modules. Before installing or removing an additional device or module, read the respective documentation ATCA-7360 Installation and Use (6806800J07S)
  • Page 29 A and input line B so that line A remains powered even if it is disconnected from the power supply circuit (and vice versa). To avoid damage or injuries, always check that there is no more voltage on the line that has been disconnected before continuing your work. ATCA-7360 Installation and Use (6806800J07S)
  • Page 30 Therefore, always use the same type of Lithium battery as is installed and make sure the battery is installed as described in this manual. Environment Always dispose of used blades, system components and RTMs according to your country’s legislation and manufacturer’s instructions. ATCA-7360 Installation and Use (6806800J07S)

  • Page 31: Sicherheitshinweise

    Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im Handbuch enthaltenen Informationen nicht garantieren. Falls Sie weitere Informationen benötigen sollten, wenden Sie sich bitte an die für Sie zuständige Geschäftsstelle von Artesyn. Das System erfüllt die für die Industrie geforderten Sicherheitsvorschriften und darf ausschließlich für Anwendungen in der Telekommunikationsindustrie und im Zusammenhang...
  • Page 32 Sicherheitshinweise Das Blade wurde in einem Artesyn Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse A. Diese Grenzwerte sollen einen angemessenen Schutz vor Störstrahlung beim Betrieb des Blades in Gewerbe- sowie Industriegebieten...
  • Page 33 Bevor Sie das Blade betreiben, müssen Sie sicher stellen, dass das Shelf über eine Zwangskühlung verfügt. Wenn Sie das Blade in Gebieten mit starker elektromagnetischer Strahlung betreiben, stellen Sie sicher, dass das Blade mit dem System verschraubt ist und das System durch ein Gehäuse abgeschirmt wird. ATCA-7360 Installation and Use (6806800J07S)
  • Page 34 Batterie Beschädigung des Blades Ein unsachgemäßer Einbau der Batterie kann gefährliche Explosionen und Beschädigungen des Blades zur Folge haben. Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung. ATCA-7360 Installation and Use (6806800J07S)
  • Page 35 Sicherheitshinweise Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung und den Empfehlungen des Herstellers. ATCA-7360 Installation and Use (6806800J07S)
  • Page 36 Sicherheitshinweise ATCA-7360 Installation and Use (6806800J07S)

  • Page 37: Introduction

    Chapter 1 Introduction Features The ATCA-7360 is a high-performance ATCA compliant single board computer designed for demanding storage and processing applications. The following is the list of main features: Dual socket Intel Xeon5500 Series CPU  Standard configuration ATCA-7360: Intel Xeon 5500 L5518 60W 2.13GHz...

  • Page 38: Standard Compliances

    Standard Description UL 60950-1 Legal safety requirements EN 60950-1 IEC 60950-1 CAN/CSA C22.2 No 60950-1 CISPR 22 EMC requirements on system level (predefined Artesyn system) CISPR 24 EN 55022 EN 55024 FCC Part 15 EN 300386 NEBS Standard GR-1089 CORE...

  • Page 39: Mechanical Data

    The following table provides details about the blade's mechanical data, such as dimensions and weight. Table 1-2 Mechanical Data Feature Value Dimensions (width x height x depth) 30 mm x 351 mm x 312 mm 8U form factor Weight of blade 3.8 kg ATCA-7360 Installation and Use (6806800J07S)

  • Page 40: Ordering Information

    Ordering Information The following table lists the blade variants that were available as of the time of writing this manual. Consult your local Artesyn sales representative for the availability of further variants. Table 1-3 Blade Variants - Ordering Information Product Name...
  • Page 41 RJ45-DSUB-ATCA7140 RJ-45 DSUB cable for the ATCA-7140, 7150, 7350, 736X SA-BBS-WR30-7360 CD - BBS SW and WR PNE3.0 for ATCA-7360 1. HDD kit option for RTM-ATCA-7360 and RTM-ATCA-7360-L 2. Persistent memory and solid state disk mutually exclusive ATCA-7360 Installation and Use (6806800J07S)

  • Page 42: Product Identification

    Introduction Product Identification The following figure illustrates the location of the serial number label. Figure 1-1 Serial Number Location ATCA-7360 Installation and Use (6806800J07S)
  • Page 43 Introduction ATCA-7360 Installation and Use (6806800J07S)
  • Page 44 Introduction ATCA-7360 Installation and Use (6806800J07S)

  • Page 45: Installation

    3. Remove the desiccant bag shipped together with the blade and dispose of it according to your country’s legislation. The blade is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, please contact our customer service immediately. ATCA-7360 Installation and Use (6806800J07S)

  • Page 46: Environmental And Power Requirements

    Blade Overheating and Blade Damage Operating the blade without forced air cooling may lead to blade overheating and thus blade damage. When operating the blade, make sure that forced air cooling is available in the shelf. ATCA-7360 Installation and Use (6806800J07S)

  • Page 47: Table 2-1 Environmental Requirements

    Random 20-200Hz at 3 m Shock Half-sine, 11 ms, 30 m/s Blade level packaging Half-sine, 6 ms at 180 m/s Free Fall 1.2 m/ packaged (according to ETSI 300 019-2-2) 100 mm unpackaged (according to Telcordia GR-63-core) ATCA-7360 Installation and Use (6806800J07S)

  • Page 48: Table 2-2 Critical Temperature Limits

    =110°C (case) cmax Intel 82572EI 2.1 W (typ. 1.5W) =97°C (case) cmax Payload DCDC 48 V/12 V 10 W DDR3 DIMM Modules 6.9 W (estimate TS 85° C team) CPU VCC controller (up to 100 A) ATCA-7360 Installation and Use (6806800J07S)

  • Page 49: Figure 2-1 Location Of Critical Temperature Spots (Blade Top Side)

    Temperature Test Point #1 (on DC/DC Converter Module): Max. 100°C (Exact location: In the geometric middle of the heat spreader). Temperature Test Point #2 (on Power Input Module): Max. 90°C (Exact location: On top of the transformer). Temperature Test Point #3 (on Hold-Up Capacitor): Max. 105°C ATCA-7360 Installation and Use (6806800J07S)

  • Page 50: Power Requirements

    Operating Voltage -39 VDC to -72 VDC Exception in the US and Canada -39 VDC to -60 VDC Maximum power consumption of ATCA-7360 (with 260 W RTM-ATCA-7360 including a SAS HDD) (200 W typical) Maximum power consumption of ATCA-7360 (without...
  • Page 51 There is also a dependency on the batch variance of the major components like the processor and DIMMs used. Artesyn does not represent or warrant that measurement results of a specific board provide guaranteed maximum values for a series of boards.

  • Page 52: Blade Layout

    Installation Blade Layout The following figure illustrates the location of components on the ATCA-7360: Figure 2-2 ATCA-7360 Blade Layout ATCA-7360 Installation and Use (6806800J07S)

  • Page 53: Switch Settings

    Switch Settings The blade provides the configuration switches SW1, SW2, SW3, and SW4. Their location is shown in Figure "ATCA-7360 Blade Layout" on page Blade Malfunction Switches marked as 'Reserved' might carry production-related functions and may cause the blade to malfunction if their setting is changed.

  • Page 54: Table 2-4 Switch Settings

    OFF: IPMI selects boot flash (default) ON: SW3-2 selects Boot Flash SW3-2 SW3-2 controls boot flash selection if SW3-1 is set to ON OFF: Boot from “Default Boot Flash” device (default) ON: Boot from “Recovery Boot Flash” device ATCA-7360 Installation and Use (6806800J07S)

  • Page 55: Installing Blade Accessories

    PMEM (persistent memory) module  SATA module  USB flash module  Rear transition modules  They are described in detail in the following sections. For order numbers refer to section Ordering Information on page ATCA-7360 Installation and Use (6806800J07S)

  • Page 56: Dimm Memory Modules

    ESD-safe environment. Installation Procedure To install a DIMM module, proceed as follows: 1. Remove the blade from system as described in Installing and Removing the Blade on page 2. Open the locks of memory module socket. ATCA-7360 Installation and Use (6806800J07S)

  • Page 57: Pmem And Sata Module

    The PMEM/SATA extension slot allows assembly of either a PMEM or SATA module which are available as upgrade kits for ATCA-7360. PMEM module consists of an SRAM and a flash memory. The SRAM has a capacity of up to 16 MB and can be used as persistent memory, that means a memory that holds up the contents during reset.
  • Page 58 S/F memory module connector is shown Figure 2-2 on page The PMEM and SATA module are accessory kits and are not part of the default ATCA-7360. The following procedure describes the steps to install/remove the PMEM/SATA module.

  • Page 59: Usb 2.0 Flash Module

    Installing and Removing the Blade on page 2.5.3 USB 2.0 Flash Module The blades provides a USB 2.0 flash module with a capacity of 4 GB or 16 GB. The corresponding removal/installation procedures are described in this section. ATCA-7360 Installation and Use (6806800J07S)

  • Page 60: Installing And Removing The Blade

    Installation The location of the USB 2.0 Flash Module is shown in Figure "ATCA-7360 Blade Layout" on page Damage of Circuits Electrostatic discharge and incorrect module installation and removal can damage circuits or shorten their life. Before touching the module or electronic components, make sure that you are working in an ESD-safe environment.

  • Page 61: Installing The Blade

    Incorrect blade installation and removal can result in blade malfunctioning. When plugging the blade in or removing it, do not press on the faceplate but use the handles. 2.6.1 Installing the Blade To install the blade into an AdvancedTCA shelf, proceed as follows. ATCA-7360 Installation and Use (6806800J07S)
  • Page 62 3. Apply equal and steady pressure to carefully slide the blade into the shelf until you feel resistance. Continue to gently push the blade until the blade connectors engage. 4. Squeeze the lever and the latch together and hook the lower and the upper handle into the shelf rail recesses. ATCA-7360 Installation and Use (6806800J07S)
  • Page 63 When the blue LED is switched OFF and the green LED (IS) is switched ON, this indicates that the payload has been powered up and the blade is active. 7. Connect cables to the faceplate, if applicable. ATCA-7360 Installation and Use (6806800J07S)

  • Page 64: Removing The Blade

    2. Wait until the blue LED is illuminated permanently, then unlatch the upper handle and rotate both handles fully outward. If the LED continues to blink, a possible reason may be that the upper layer software rejected the blade extraction request. ATCA-7360 Installation and Use (6806800J07S)
  • Page 65 Wait until the blue LED is permanently illuminated, before removing the blade. 3. Remove faceplate cables, if applicable. 4. Unfasten the screws of the faceplate until the blade is detached from the shelf. 5. Remove the blade from the shelf. ATCA-7360 Installation and Use (6806800J07S)
  • Page 66 Installation ATCA-7360 Installation and Use (6806800J07S)

  • Page 67: Controls, Indicators, And Connectors

    P9910 R1249 R1272 J242 C1463 R1236 CD10 CD10 CE29 C1490 C3026 R1235 J118 R1244 C4338 R1223 J117 C1480 C1453 R1221 R1252 R1276 T220 R1238 R1242 R1243 R1239 ZKEY2 ZKEY4 R1275 C1481 R1247 R1219 R1225 R1228 ATCA-7360 Installation and Use (6806800J07S)

  • Page 68: Faceplate

    Controls, Indicators, and Connectors Faceplate The following figure illustrates the connectors, keys and LEDs available at the faceplate. Figure 3-2 Faceplate ATCA-7360 Installation and Use (6806800J07S)

  • Page 69: Leds

    Controls, Indicators, and Connectors 3.2.1 LEDs The following figure illustrates all the LEDs available at the faceplate. Figure 3-3 Location of Faceplate LEDs ATCA-7360 Installation and Use (6806800J07S)

  • Page 70: Table 3-1 Faceplate Leds

    Green: Link is available Off: No link Activity (lower) Yellow: Activity Off: No activity U1, U2 Base interface activity is visualized via FPGA LEDs U1 and U2 User LED, selectable color via FPGA register. Colors: red, green, orange ATCA-7360 Installation and Use (6806800J07S)

  • Page 71: Keys

    Blinking blue: Blade notifies shelf manager of its desire to deactivate Permanently blue: Blade is ready to be extracted 3.2.2 Keys The blade provides one faceplate reset key. Figure 3-4 Location of Faceplate Reset Key U1 U2 U3 ATCA-7360 Installation and Use (6806800J07S)

  • Page 72: Connectors

    AdvancedTCA Base interfaces, a third Ethernet interface to access the blade. The location of the Ethernet connector is shown in the following figure. Figure 3-5 Location of Ethernet Connector U1 U2 U3 ATCA-7360 Installation and Use (6806800J07S)

  • Page 73: Serial Interface Connector

    SW2-1 also changes the serial connector that you need to access to make use of the serial redirection feature. The location of the connector is shown in the following figure. Figure 3-7 Location of Serial Connector U1 U2 U3 USB1 USB2 ATCA-7360 Installation and Use (6806800J07S)

  • Page 74: Usb Connectors

    The blade provides two USB connectors at its faceplate. They are compliant to the USB 2.0 standard and correspond to the blade's USB interfaces 3 and 4. Their location is shown in the following figure. Figure 3-9 Location of USB Connectors U1 U2 U3 USB1 USB2 ATCA-7360 Installation and Use (6806800J07S)

  • Page 75: On-Board Connectors

    Figure 3-10 USB Connector Pinout VP5_USB USB_x_D- USB_x_D+ Exceeding the maximum USB current rating of 500mA per port will result in ATCA-7360 protecting itself through a controlled board shutdown. On-board Connectors The blade provides the following on-board connectors: PMEM/SATA module connector ...

  • Page 76: Figure 3-11 Location Of Pmem/Sfmem Module Connector

    Controls, Indicators, and Connectors The location of the PMEM/SFMEM module connector is shown in the following figure. Figure 3-11 Location of PMEM/SFMEM Module Connector ATCA-7360 Installation and Use (6806800J07S)

  • Page 77: Figure 3-12 Pmem/Sata Module Connector Pinout

    Controls, Indicators, and Connectors The pinout of this connector is shown in the following figure. Figure 3-12 PMEM/SATA Module Connector Pinout ATCA-7360 Installation and Use (6806800J07S)

  • Page 78: Usb Flash Module Connector

    Controls, Indicators, and Connectors 3.3.2 USB Flash Module Connector The location of the flash memory module connector is shown in the following figure. Figure 3-13 Location of USB Flash Module Connector ATCA-7360 Installation and Use (6806800J07S)

  • Page 79: Figure 3-14 Usb Flash Module Connector Pin Assignment

    Controls, Indicators, and Connectors You can find the pin assignment of the flash connector in the following figure. Figure 3-14 USB Flash Module Connector Pin Assignment n.c. n.c. USB_D- n.c. USB_D+ n.c. n.c. ATCA-7360 Installation and Use (6806800J07S)

  • Page 80: Advancedtca Backplane Connectors

    The AdvancedTCA backplane connectors reside in the three zones 1 to 3 as specified by the AdvancedTCA standard and are called P10, P20 and 23 and P30 and 32. The pinouts of all these connectors are given in this section. Figure 3-15 Location of AdvancedTCA Connectors ATCA-7360 Installation and Use (6806800J07S)

  • Page 81: Figure 3-16 P10 Backplane Connector Pinout

    Reserved signals  Figure 3-16 P10 Backplane Connector Pinout Zone 2 contains the two connectors P20 and P23. They carry the following types of signals: Telecom clock signals (CLKx_)  Base interface signals (BASE_)  ATCA-7360 Installation and Use (6806800J07S)

  • Page 82: Figure 3-17 P20 Backplane Connector Pinout - Rows A To D

    In all other cases the pins are not connected and consequently marked as "n.c.". The pinouts of P20 and P23 are as follows. Figure 3-17 P20 Backplane Connector Pinout - Rows A to D ATCA-7360 Installation and Use (6806800J07S)

  • Page 83: Figure 3-18 P20 Backplane Connector Pinout - Rows E To H

    Controls, Indicators, and Connectors Figure 3-18 P20 Backplane Connector Pinout - Rows E to H Figure 3-19 P23 Backplane Connector Pinout - Rows A to D ATCA-7360 Installation and Use (6806800J07S)

  • Page 84: Figure 3-20 P23 Backplane Connector Pinout - Rows E To H

    Zone 3 contains the two connectors P30 and P32. They are used to connect an RTM to the blade and carry the following signals: Serial (RS232_x_yyyy)  Serial ATA (SATAx_yyy)  USB (USBxy)  PCI Express (PCIEx_yyy)  IPMI (IPMB1_xxx, ISMB_xxx)  Power (VP12_RTM, V3P3_RTM, VP5_RTM)  ATCA-7360 Installation and Use (6806800J07S)

  • Page 85: Figure 3-21 P30 Backplane Connector Pinout - Rows A To D

    Controls, Indicators, and Connectors SAS Update channels  General control signals (BD_PRESENTx, RTM_PRSNT_N, RTM_RST_KEY-, RTM_RST-)  Figure 3-21 P30 Backplane Connector Pinout - Rows A to D Figure 3-22 P30 Backplane Connector Pinout - Rows E to H ATCA-7360 Installation and Use (6806800J07S)

  • Page 86: Figure 3-23 P32 Backplane Connector Pinout - Rows A To D

    Controls, Indicators, and Connectors Figure 3-23 P32 Backplane Connector Pinout - Rows A to D Figure 3-24 P32 Backplane Connector Pinout - Rows E to H ATCA-7360 Installation and Use (6806800J07S)

  • Page 87: Bios

    System Boot Options Parameter #96 on page 222. The BIOS used on the blade is based on the AMI UEFI BIOS with several Artesyn extensions integrated. Its main features are: Initialize CPU, chipset and memory ...

  • Page 88: Accessing The Blade Using The Serial Console Redirection

    Terminal emulation programs such as TeraTermPro can be used. In order to use TeraTermPro using the function keys, the keyboard configuration file of TeraTermPro has to be modified as follows: Table 4-1 BIOS Key Codes for Terminal Emulation Program Function Key Key Code ATCA-7360 Installation and Use (6806800J07S)

  • Page 89: Default Access Parameters

    3. Connect NULL-modem cable to COM port of the blade. 4. Start up blade. Changing Configuration Settings When the system is switched on or rebooted, the presence and functionality of the system components is tested by Power-On Self-Test (POST). ATCA-7360 Installation and Use (6806800J07S)

  • Page 90: Main Menu

    In order to navigate in setup, use the arrow keys on the keyboard to highlight items on the menu. All other navigation possibilities are shown at the bottom of the menu. Additionally, an item-specific help is displayed on the right side of the menu window. ATCA-7360 Installation and Use (6806800J07S)

  • Page 91: Boot Options

    There are two possibilities to determine the device from which BIOS attempts to boot: By setup to select a permanent order of boot devices  By boot selection menu to select any device for the next boot-up procedure only  ATCA-7360 Installation and Use (6806800J07S)
  • Page 92 Changes have to be saved and the board has to be rebooted when changing the Option Rom Execution. If BIOS is not successful at booting from one device, it tries to boot from the next device on the list. ATCA-7360 Installation and Use (6806800J07S)

  • Page 93: By Boot Selection Menu

    2. Override existing boot sequence by selecting another boot device from the boot override list. If the selected device does not load the operating system, BIOS resets the board and reverts to the previous boot sequence. ATCA-7360 Installation and Use (6806800J07S)

  • Page 94: Iscsi Setup For Base And Fabric Ethernet

    4. To enter iSCSI setup, press Ctrl-D when following message displayed: Intel (R) iSCSI Remote Boot version 2.7.53 Copyright (c) 2003-2010 Intel Corporation. All rights reserved. Press ESC key to skip iSCSI boot initialization. Press <Ctrl-D> to run setup... ATCA-7360 Installation and Use (6806800J07S)

  • Page 95: Iscsi Port Selection

    Port Selection The following table provides information about Ethernet Port Mapping. Table 4-2 Ethernet port mapping Network Device iSCSI Option ROM Device Base1 Dev:10C9 Loc:1:0:0 Base2 Dev:10C9 Loc:1:0:1 Fabric1 Dev:10FC Loc:4:0:0 Fabric2 Dev:10FC Loc:4:0:1 ATCA-7360 Installation and Use (6806800J07S)

  • Page 96: Iscsi Port Configuration

    Enter the Port configuration menu for the selected device 4.4.4.2 iSCSI Port Configuration The following figure depicts the iSCSI Port Configuration screen. Figure 4-5 iSCSI Port Configuration Configure iSCSI port, Discard, Save and Exit menu items. ATCA-7360 Installation and Use (6806800J07S)

  • Page 97: Iscsi Boot Configuration

    BIOS 4.4.4.3 iSCSI Boot Configuration The following figure depicts the iSCSI Boot Configuration screen. Figure 4-6 iSCSI Boot Configuration Enter Initiator and Target network configuration parameter. ATCA-7360 Installation and Use (6806800J07S)

  • Page 98: Iscsi Challenge Handshake Authentication Protocol (Chap) Configuration

    BIOS 4.4.4.4 iSCSI Challenge Handshake Authentication Protocol (CHAP) Configuration The following figure depicts the iSCSI CHAP Configuration screen. Figure 4-7 iSCSI CHAP Configuration Enter Challenge Handshake Authentication Protocol configuration parameter. ATCA-7360 Installation and Use (6806800J07S)

  • Page 99: Bios Setup Configuration

    3. Some OS like Windows NT cannot handle a value greater than 3. Disabled (Default) Default value is disabled. The CPUID instruction function 0 returns the number of the maximum standard functions. ATCA-7360 Installation and Use (6806800J07S)
  • Page 100 Package C State limit C0, C1, C3, C6, C7, Specifies the lowest C-State (Low Power idle state) for the No Limit (Default) CPU package. Lower C states correspond lower power consumption and with a longer C-state entry/exit latency. ATCA-7360 Installation and Use (6806800J07S)

  • Page 101: Advanced -> Memory Configuration

    Way, 3 Way, 2 Way, 1 Way Recommended value: Auto Rank Interleaving Auto (Default), 4 Way, 2 Select different rank Interleaving setting. Way, 1 Way Recommended value: Auto Hardware Memory Test Enable (Default) Enable/Disable hardware memory test. Disable ATCA-7360 Installation and Use (6806800J07S)

  • Page 102: Advanced -> Chipset - North Bridge

    This option is active when Auto-Detect RTM is set to Enable. PCIe to RTM x4x4x4x4, x4x4x8, Selects PCIe port bifurcation for Zone 3 connector x8x4x4, x8x8, x16 (RTM). This option is active when Auto-Detect RTM is set to Enable. ATCA-7360 Installation and Use (6806800J07S)

  • Page 103: Table 4-8 Chipset - North Bridge -> Intel (R) Vt For Directed I/O Configuration

    Recommended value: Disable Low Threshold 70..127 Low temperature threshold for thermal sensor. Default 90 High Threshold 70..127 High temperature threshold for thermal sensor. Default 100 Catastrophic Threshold 70..127 Critical temperature threshold for thermal sensor. Default 110 ATCA-7360 Installation and Use (6806800J07S)

  • Page 104: Advanced -> Chipset - South Bridge

    Enable/Disable USB 2.0 (EHCI) Support Disabled Front Panel USB Enabled (Default) Enable/Disable Front Panel USB Disabled Onboard USB Flash Disk Enabled (Default) Enable/Disable Onboard USB FlashDisk Disabled ARTM USB Enabled (Default) Enable/Disable USB on ARTM Disabled ATCA-7360 Installation and Use (6806800J07S)

  • Page 105: Advanced -> Sata Configuration

    Select Disabled to enable a workaround for OS Disabled without EHCI hand-off support. Port 60/64 Emulation Enabled (Default) Enables I/O port 60h/64h emulation support. This Disabled should be enabled for the complete USB keyboard legacy support for non-USB aware OS. ATCA-7360 Installation and Use (6806800J07S)

  • Page 106: Advanced -> Super Io Configuration

    Serial Port Enabled (Default) Enable or Disable Serial Port (COM 0) Disabled Change Settings Auto, Select IO port and Interrupt settings for COM 0 IO=3F8h IRQ=4 (Default), IO=3F8h IRQ=3,4,5,6,7,10,11,12, IO=2F8h IRQ=3,4,5,6,7,10,11,12, IO=3E8h IRQ=3,4,5,6,7,10,11,12, IO=2E8h IRQ=3,4,5,6,7,10,11,12 ATCA-7360 Installation and Use (6806800J07S)

  • Page 107: Advanced -> Serial Port Console Redirection

    Bits per second 9600 (Default), 19200, Selects serial port transmission speed. The speed 57600, 115200 must be matched on the other side. Long or noisy lines may require lower speeds. Data Bits 7, 8 (Default) Data Bits ATCA-7360 Installation and Use (6806800J07S)

  • Page 108: Advanced -> Uefi Network Stack

    Runtime Error Logging on page 119 Table 4-18 Advanced -> Runtime Error Logging Item Values Description Runtime Error Logging Enabled (Default) Enable/Disable Runtime Error Logging Support. Events Disabled are sent to SMBIOS error log and IPMI SEL. ATCA-7360 Installation and Use (6806800J07S)

  • Page 109: Advanced -> Smbios Event Log

    SMBIOS Post Errors. Inject Errors Enabled Inject Errors before booting a OS: Following errors are Disabled (Default) injected: No Console found, IPMI Boot Parameter Checksum error, CPU Self test failure, Bad Battery. ATCA-7360 Installation and Use (6806800J07S)

  • Page 110: Advanced -> Local Ipmi System Event Log

    This watchdog monitors BIOS initialization tasks. FRB2 Timer timeout 3, 4, 5, 6 minutes Enter value Between 3 to 6 min for FRB2 Timer Expiration Default 6 minutes value. Not available if FRB2 Timer is disabled. ATCA-7360 Installation and Use (6806800J07S)

  • Page 111: Ipmi -> System Event Log

    This menu is for configuration of iSCSI boot of UEFI compatible Operating Systems. iSCSI boot is enabled when UEFI Network stack is set to Enabled (see BIOS setup Advanced -> UEFI Network Stack link). ATCA-7360 Installation and Use (6806800J07S)

  • Page 112: Table 4-24 Iscsi

    CHAP Type None (Default), Select the CHAP (Challenge-Handshake Authentication One Way, Protocol) type. Mutual Save Changes Press Enter to Save Changes Back To Previous Page Press Enter to Return to the previous Page (same as ESC) ATCA-7360 Installation and Use (6806800J07S)

  • Page 113: Boot

    Disabled (Default) Ethernet controller. Select Enabled when RTM Network Boot is required. ARTM SAS Boot Enabled (Default), Controls execution of the Option ROM for RTM SAS Disabled controller. Select Enabled when RTM SAS Boot is required. ATCA-7360 Installation and Use (6806800J07S)

  • Page 114: Security

    Discard Changes done so far to any of the setup options. Restore Defaults Restore/Load Defaults values for all the setup options. Boot Override Select a Boot Device to boot one time. Boot order is not changed. ATCA-7360 Installation and Use (6806800J07S)

  • Page 115: Cpu Performance Settings

    Memory Configuration The Intel Xeon processor 5600 series supports four different memory RAS (Reliability, Availability, and Serviceability) modes: Independent Channel Mode, Spare Channel Mode, Mirrored Channel Mode, and Lockstep Channel Mode. ATCA-7360 Installation and Use (6806800J07S)

  • Page 116: Independent Channel Mode

    When mirroring is enabled, the memory image in Channel 0 is maintained the same as Channel 1. DIMMs in Channel 2 are not used. Uncorrectable errors are logged and signaled as correctable, but change the channel state to "Disabled", and the working partner to Redundancy Loss. ATCA-7360 Installation and Use (6806800J07S)

  • Page 117: Lockstep Channel Mode

    Installing and Removing the Blade on page 60 for procedure. 4. Wait until the blade has completely booted and is up and running. 5. Remove the blade from the system again. Installing and Removing the Blade on page 60 for procedure. ATCA-7360 Installation and Use (6806800J07S)

  • Page 118: Shelf Slot Power Requirement

    Shortly before closing BIOS and starting an operation system, LED U3 is set to OFF. 4.11 Upgrading the BIOS A BIOS upgrade kit for the blade allows the BIOS to be upgraded. The BIOS upgrade kit contains documentation which describes in detail how to upgrade the BIOS. ATCA-7360 Installation and Use (6806800J07S)

  • Page 119: Bios Error Logging

    Advanced -> Runtime Error Logging. Errors are logged to the IPMI controller and to the SMBIOS event log. The Runtime Error Logging can be enabled or disabled. If enabled, the PCI Error Logging can be enabled or disabled separately. ATCA-7360 Installation and Use (6806800J07S)

  • Page 120: Error Simulation

    Enable 'Inject Errors' in 'Event Logs' -> 'SMBIOS Event Log Settings' in BIOS setup. The following errors are injected short before the OS is booted: No Console found  IPMI Boot Parameter Checksum error  CPU Self test failure  Bad battery  ATCA-7360 Installation and Use (6806800J07S)
  • Page 121 BIOS These errors are logged to SMBIOS error log, IPMI error log (local SEL and Shelf manager) and to the console. ATCA-7360 Installation and Use (6806800J07S)

  • Page 122: Ipmi Error Logging

    03h Secondary processor initialization 04h User authentication 05h User-initiated system setup 06h USB configuration 07h PCI configuration 08h Option ROM initialization 09h Video initialization 0Ah Cache initialization 0Ch Console input initialization 13h Starting Operating System ATCA-7360 Installation and Use (6806800J07S)
  • Page 123 90h Reboot after a FRB2 Watchdog Timeout 91h Reboot after a BIOS/POST Watchdog Timeout 92h Reboot after a OS Load Watchdog Timeout 93h Reboot after a SMS/OS Watchdog Timeout 94h Reboot after a OEM Watchdog Timeout ATCA-7360 Installation and Use (6806800J07S)

  • Page 124: Smbios Error Logging

    CPU Failure  Correctable memory log disabled  Log Area Reset/Cleared  System boot  OEM Event: "EFI Status code"  See System Management BIOS (SMBIOS) Reference Specification Version: 2.7.0 Chapter 7.16.6.1 Event Log Types. ATCA-7360 Installation and Use (6806800J07S)

  • Page 125: Single-Bit Ecc Memory Error

    This event is generated from the runtime error logging module. See Runtime Error Logging on page 119. Table 4-32 Multi-bit ECC Memory Error Event Format Offset Name Format Description Event Type BYTE Event Type = 02h Length BYTE always 0Ch ATCA-7360 Installation and Use (6806800J07S)

  • Page 126: Post Error

    02h-07h Date/Time Fields BYTE These fields contain the BCD representation of the date and time 08h-0Bh Result First DWORD UINT32 Table 4-35 on page 127 0Ch-0Fh Result Second DWORD UINT32 Table 4-36 on page 127 ATCA-7360 Installation and Use (6806800J07S)

  • Page 127: Table 4-35 Result First Dword Supported Post Errors

    Base Network Error Fabric Network Error Update Channel Network Error PCI Memory Conflict Static Resource Conflict e.g. No Space for OPROM System Board Device Resource Conflict Primary Output Device Not Found NVRAM Data Invalid. Flash write error ATCA-7360 Installation and Use (6806800J07S)

  • Page 128: Pci Parity Error

    These fields contain the BCD representation of the date and time 08h-0Bh PCI Information UINT32 OEM extension PCI Information Definition: Table 4-38 PCI Information Definition Description reserved 8-15 PCI Function 16-23 PCI Device 24-31 PCI Bus number ATCA-7360 Installation and Use (6806800J07S)

  • Page 129: Pci System Error

    Table 4-41 CPU Failure Event Format Offset Name Format Description Event Type BYTE Event Type = 0Bh Length BYTE always 0Ch 02h-07h Date/Time Fields BYTE These fields contain the BCD representation of the date and time ATCA-7360 Installation and Use (6806800J07S)

  • Page 130: Correctable Memory Log Disabled

    Table 4-44 Log Area Reset/Cleared Event Format Offset Name Format Description Event Type BYTE Event Type = 16h Length BYTE always 08h 02h-07h Date/Time Fields BYTE These fields contain the BCD representation of the date and time ATCA-7360 Installation and Use (6806800J07S)

  • Page 131: System Boot

    These fields contain the BCD representation of the date and time 08h-0Bh Status Code Type UINT32 Error Code Severity 0Ch-0Fh Status Code Value UINT32 Error Code Value 10h-13h Instance UINT32 Additional Information e.g. DIMM Socket number ATCA-7360 Installation and Use (6806800J07S)

  • Page 132: Table 4-47 Status Code Type Definition

    Operation code 16-23 SubClass code 24-31 Class code Table 4-49 Class Code Description Computing Unit Peripheral IO-Bus Software 4.12.4.10.1Artesyn OEM Extensions Class Computing Unit: Table 4-50 SubClass EFI_COMPUTING_UNIT_CHIPSET (06h) Operation Code Description 800Bh Bad Battery ATCA-7360 Installation and Use (6806800J07S)

  • Page 133: Bios Status Codes

    BIOS phase. The reading can be used to locate the cause of a board hang during BIOS phase. When the board has booted a OS, the reading of the '"POST code" sensor returns no valid status code. ATCA-7360 Installation and Use (6806800J07S)

  • Page 134: Status Code Ranges

    Table 4-53 SEC Status Codes Status Code Description Not used Progress Codes Power on. Reset type detection (soft/hard). AP initialization before microcode loading North Bridge initialization before microcode loading South Bridge initialization before microcode loading ATCA-7360 Installation and Use (6806800J07S)

  • Page 135: Table 4-54 Pei Status Codes

    CPU post-memory initialization is started 0x33 CPU post-memory initialization. Cache initialization 0x34 CPU post-memory initialization. Application Processor(s) (AP) initialization 0x35 CPU post-memory initialization. Boot Strap Processor (BSP) selection 0x36 CPU post-memory initialization. System Management Mode (SMM) initialization) ATCA-7360 Installation and Use (6806800J07S)
  • Page 136 Memory not installed 0x56 Invalid CPU type or Speed 0x57 CPU mismatch 0x58 CPU self test failed or possible CPU cache error 0x59 CPU micro-code is not found or micro-code update is failed 0x5A Internal CPU error ATCA-7360 Installation and Use (6806800J07S)

  • Page 137: Table 4-55 Dxe Status Codes

    Table 4-55 DXE Status Codes Status Code Description 0x60 DXE Core is started 0x61 NVRAM initialization 0x62 Installation of the South Bridge Runtime Services 0x63 CPU DXE initialization is started 0x68 PCI host bridge initialization ATCA-7360 Installation and Use (6806800J07S)
  • Page 138 Console input devices connect 0x99 Super IO Initialization 0x9A USB initialization is started 0x9B USB Reset 0x9C USB Detect 0x9D USB Enable 0xA0 IDE initialization is started 0xA1 IDE Reset 0xA2 IDE Detect 0xA3 IDE Enable ATCA-7360 Installation and Use (6806800J07S)
  • Page 139 Some of the Architectural Protocols are not available 0xD4 PCI resource allocation error. Out of Resources 0xD5 No Space for Legacy Option ROM 0xD6 No Console Output Devices are found 0xD7 No Console Input Devices are found ATCA-7360 Installation and Use (6806800J07S)
  • Page 140 Table 4-55 DXE Status Codes (continued) Status Code Description 0xD8 Invalid password 0xD9 Error loading Boot Option (LoadImage returned error) 0xDA Boot Option is failed (StartImage returned error) 0xDB Flash update is failed 0xDC Reset protocol is not available ATCA-7360 Installation and Use (6806800J07S)

  • Page 141: Functional Description

    PCIe x4 ATCA3.0 Base IF 82576 Kawela 2x 10/100/1000Base-T Debug Rec. Socket SMB: Serial over LAN Pass Through FPGA COM_RTM 3.3V Port80 FUSING. COM_IPMC -48V EMI, Zone 1 INRUSH, 5 ms holdup -48V IPMC RS232 IPMB-A/B ATCA-7360 Installation and Use (6806800J07S)

  • Page 142: Processor

    Functional Description Processor ATCA-7360 provides two Intel Xeon L5518 Quadcore processors as central processing unit (CPU). Both CPUs are based on 45 nm process technology and provide the following main features: 2.13GHz core frequency  32 KB instruction cache per core ...

  • Page 143: Persistent Memory

    LPC interface  SPI Interface (Boot Flash): up to two devices 20 + 33 MHz  Six serial ATA (SATA) interfaces (2 used on ATCA-7360)  Twelve USB 2.0 interfaces (4 used on ATCA-7360)  Two 8259 Interrupt Controllers and I/O APIC controllers ...

  • Page 144: Firmware Flashes

    Recovery BIOS Flash (SPI 1)  The flash is allocated for storing the binary code of the BIOS. The ATCA-7360 boots from the primary flash SPI 0 under normal circumstances. If booting BIOS from primary flash SPI 0 fails, a hardware mechanism automatically changes the flash device select logic to boot from the recovery flash SPI 1.

  • Page 145: Ethernet Ports

    RTM based disk located in a logically paired ATCA slot. Embedded Flash Disk The ATCA-7360 by default, provides an onboard USB Flash module (4GB) solid state disk. The disk can keep data, application SW and OS boot images. Booting from the device is supported.

  • Page 146: Sata Embedded Flash Solid State Disc (Ssd)

    ATCA-7360/SATA module which is available as an accessory kit. 5.10 BIOS The ATCA-7360 blade provides a BIOS firmware that is stored in flash memory. It can be updated remotely via Ethernet or locally via operating system. Along with the BIOS and BIOS Setup program, the flash memory contains POST and Plug and Play support.

  • Page 147: Serial Redirection

    UART to/from a remote client via LAN over RMCP+ sessions. This enables users at remote consoles to access the serial port of a blade/server and interact with a text-based BIOS console, operating system, command line interfaces, and serial text-based applications. ATCA-7360 Installation and Use (6806800J07S)

  • Page 148: Control Logic

    Out of Service, In Service, Attention, and Hot Swap LEDs  One 1000Base-T Ethernet port  Recessed reset button  The blade design provides the possibility to cover unused faceplate elements like LEDs or push button behind a custom overlay foil. ATCA-7360 Installation and Use (6806800J07S)

  • Page 149: Usb 2.0 Interface

    1010.001x b=A2 SPD EEPROM 24C02 1010.010x b=A4 SPD EEPROM 24C02 1010.011x b=A6 SPD EEPROM 24C02 1010.100x b=A8 SPD EEPROM 24C02 1010.101x b=AA Temp Sens#0 LM75 0x90 Temp Sens#1 LM75 0x92 DDR3 VREF_D margining ISL90728 0x7C ATCA-7360 Installation and Use (6806800J07S)

  • Page 150: Real Time Clock

    The optional power-down backup method uses a Super CAP with a 1 Farad capacity. This provides 300 hours of RTC/SRAM backup. The default battery is an external +3 V lithium battery with a capacity of 200 mAh, which provides 3 years of backup. ATCA-7360 Installation and Use (6806800J07S)

  • Page 151: Maps And Registers

    In APIC mode the ICH10R supports only front side bus interrupt delivery (not the serial APIC mode). The following figure and tables summarize the interrupt sources and mappings for ATCA-7360 blade. APIC mode is configured through BIOS after boot-up phase which is done in legacy PIC mode.

  • Page 152: Table 6-1 Non-Apic (Pic Mode / 8259 Mode) Interrupt Mapping

    SATA Primary (legacy mode), or via SERIRQ or PIRQ# SATA SATA Secondary (legacy mode), or via SERIRQ or PIRQ# Table 6-2 APIC Mode Interrupt Mapping Interrupt Source Cascade from 8259 1 8254 Counter 0, Timer 0 (legacy mode) ATCA-7360 Installation and Use (6806800J07S)
  • Page 153 PIRQ[H]# (GPIO) In APIC mode the PCI Interrupts A:H are mapped to IRQ[16:23]. If an interrupt is used for PCI IRQ[A:H], SCI or TCO it must not be used for ISA (legacy)-style interrupts (via SERIRQ). ATCA-7360 Installation and Use (6806800J07S)

  • Page 154: Pci Express Port Mapping

    Xeon 5520 (Tylersburg IOH36 D) PCI express ports have the naming convention as seen in Figure 6-2 on page 154. Table 6-3 PCIexpress Port mapping Port# Figure 6-2 IOH36D PCIe Port mapping on ATCA-7360 Registers For register description the convention shown in Table 6-4 Register Default and Table 6-5 Register Access Type are used.

  • Page 155: Register Decoding

    For example, IPMC: r/w means that the register bit is read/writable from IPMC SPI interface 6.3.1 Register Decoding The FPGA registers may be accessed from the host or the IPMC. For the host the LPC bus interface is used. The IPMC uses an SPI interface. ATCA-7360 Installation and Use (6806800J07S)

  • Page 156: Lpc Decoding

    COM1 or COM2 (only when enabled during Super IO configuration) are decoded by the LPC core. 6.3.1.1.2 LPC Memory Decoding The LPC interface never responds to LPC Memory accesses. 6.3.1.1.3 LPC Firmware Decoding The LPC interface never responds to LPC Firmware accesses. ATCA-7360 Installation and Use (6806800J07S)

  • Page 157: Spi Register Decoding

    The IPMC may read the POST code using the SPI interface (with the signal IPMC_SPI_SS_FPGA_ asserted) and the SPI address 0x7F. Table 6-8 POST Code Register LPC I/O Address: 0x80 IPMC SPI Address: 0x7f Description Default Access POST codes from host LPC: r/w IPMC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 158: Super Io Configuration Register

    The device enters the Configuration State by the following contiguous sequence: 1. Write 68 to Configuration Index Port. 2. Write 08 to Configuration Index Port. 6.3.3.2 Configuration Mode The system sets the logical device information and activates desired logical devices through INDEX and DATA ports. ATCA-7360 Installation and Use (6806800J07S)

  • Page 159: Super Io Configuration Registers

    Table 6-11 Global Configuration Register Summary Index Address Description 0x07 Super IO Logical Device Number 0x20 Super IO Device ID 0x21 Super IO Device Revision 0x28 Super IO LPC Control 0x29 Super IO SERIRQ and Pre-divide Control ATCA-7360 Installation and Use (6806800J07S)

  • Page 160: Table 6-12 Super Io Logical Device Number Register

    Default Access Device Revision 0x01 LPC: r Table 6-15 Super IO LPC Control Register Index Address: 0x28 Description Default Access LPC Bus Wait States: LPC: r 1: Long wait states (sync 6) Reserved LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 161: Table 6-16 Global Super Io Serirq And Pre-Divide Control Register

    Table 6-17 Logical Device Configuration Register Summary Index Address Description 0x30 Enable 0x60 Base IO Address MSB 0x61 Base IO Address LSB 0x70 Primary Interrupt Select 0x74 Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 162: Table 6-18 Logical Device Enable Register

    Registers 0x60 (MSB) and 0x61 (LSB) set the Logical Device Base IO for this logical device. For example for Base IO address 0x3F8 the content of Register 0x60 is 0x03 and the content of Register 0x61is 0xF8. ATCA-7360 Installation and Use (6806800J07S)

  • Page 163: Table 6-21 Logical Device Common Decode Ranges

    0x0: no interrupt selected 0x1: IRQ1 0x2: IRQ2 0x3: IRQ3 0x4: IRQ4 0x5: IRQ5 0x6: IRQ6 0x7: IRQ7 0x8: IRQ8 0x9: IRQ9 0xA: IRQ10 0xB: IRQ11 0xC: IRQ12 0xD: IRQ13 0xE: IRQ14 0xF: IRQ15 Reserved LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 164: Uart1 And Uart2 Register Map

    See Super IO Configuration Registers on page 159. 6.3.4.1 UART Register Overview Table 6-26 on page 165 shows the registers and their addresses as offsets of a base address for one of the two UARTs. ATCA-7360 Installation and Use (6806800J07S)

  • Page 165: Table 6-26 Uart Register Overview

    Base + 5 Line Status Register (LSR). Read Only Base + 6 Modem Status Register (MSR). Read Only Base + 7 Scratch Pad Register (SCR) Base Divisor Latch LSB (DLL) Base + 1 Divisor Latch MSB (DLM) ATCA-7360 Installation and Use (6806800J07S)

  • Page 166: Uart Registers Dlab=0

    Undefined LPC: w In FIFO mode, writing to THR puts data to the top of the FIFO. The data at the bottom of the FIFO is loaded to the shift register when it is empty. ATCA-7360 Installation and Use (6806800J07S)

  • Page 167: Table 6-29 Interrupt Enable Register (Ier), If Dlab=0

    Receiver line status interrupt enable/disable LPC: r/w 1: receiver line status interrupt enabled 0: receiver line status interrupt disabled Modem status interrupt enable/disable: LPC: r/w 1: modem status interrupt enabled 0: modem status interrupt disabled Reserved LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 168: Table 6-30 Uart Interrupt Priorities

    11: Receiver line status 10: Receiver data available 01: Transmitter holding register empty 00: Modem status Time Out Detected: LPC: r 0: No time out interrupt is pending 1: Character time-out indication (FIFO mode only) Reserved LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 169: Table 6-32 Fifo Control Register (Fcr)

    0: No effect Transmit FIFO reset: LPC: w 1: Bytes in receiver FIFO and counter are reset. Shift register is not reset (bit is self-clearing) 0: No effect Receiver/Transmitter ready. Not supported. LPC: w Reserved LPC: w ATCA-7360 Installation and Use (6806800J07S)

  • Page 170: Table 6-33 Line Control Register (Lcr)

    Stop bit length: LPC: r/w 1: 1.5 stop bits for 5 bit WORD length 1: 2 stop bits for 6, 7, and 8 bit WORD length 0: 1 stop bit for any serial character WORD length ATCA-7360 Installation and Use (6806800J07S)
  • Page 171 TXD is forced to the spacing (cleared) state. When bit 6 is cleared, the break condition is disabled and has no affect on the transmitter logic. It only effects TXD: 1: Break condition enabled 0: Break condition disabled ATCA-7360 Installation and Use (6806800J07S)

  • Page 172: Table 6-34 Modem Control Register (Mcr)

    1: OUT1# output in high state 0: OUT1# output in low state Not supported User output control signal (OUT2#): LPC: r/w 1: OUT2# output in high state 0: OUT2# output in low state Not supported ATCA-7360 Installation and Use (6806800J07S)
  • Page 173 LSR error bits are set and are not cleared until software reads LSR, even if the character in the FIFO is read and a new character is now at the top of the FIFO. ATCA-7360 Installation and Use (6806800J07S)
  • Page 174 An overrun error is indicated to the CPU as soon as it happens. The character in the shift register is overwritten but it is not transferred to the FIFO: 1: Overrun error occurred 0: No overrun error ATCA-7360 Installation and Use (6806800J07S)
  • Page 175 FIFO. The next character transfer is enabled after RXD goes to the marking state for at least two Receiver CLK samples and then receives the next valid start bit: 1: Full WORD transmission time exceeded 0: Normal operation ATCA-7360 Installation and Use (6806800J07S)
  • Page 176 Modem Status register provide change information. Bits 03:00 are set to a logic 1 when a control input from the Modem changes state. They are reset to a logic 0 when the processor reads the Modem Status register. ATCA-7360 Installation and Use (6806800J07S)

  • Page 177: Table 6-36 Modem Status Register (Msr)

    DDCD indicates that the DCD# input to the chip has changed state since the last time it was read by the CPU. When DDCD is set and the modem status interrupt is enabled, a modem status interrupt is generated. Not supported. ATCA-7360 Installation and Use (6806800J07S)

  • Page 178: Table 6-37 Scratch Register (Scr))

    The scratch register is an 8 bit register that is intended for the programmer's use as a scratch pad in the sense that it temporarily holds the programmer's data without affecting any other ACE operation. ATCA-7360 Installation and Use (6806800J07S)

  • Page 179: Programmable Baud Rate Generator

    Divisor Latch LSB (DLL) Undef. LPC: r/w Table 6-39 Divisor Latch MSB Register (DLM), if DLAB=1 LPC IO Address: Base + 1 Description Default Access Divisor Latch MSB (DLM) Undef. LPC: r/w FPGA Register Mapping ATCA-7360 Installation and Use (6806800J07S)

  • Page 180: Lpc I/O Register Map

    BIOS IPMC Watch dog timeout Register 0x13 BIOS Push Button Enable Register 0x14 OS Reset Source Register 0x15 OS IPMC Watch dog timeout Register 0x16 IPMC Watch dog timeout Register 0x17 IPMC Reset Source Register 0x18 -0x19 RTM SPI Interface ATCA-7360 Installation and Use (6806800J07S)
  • Page 181 Miscellaneous Status/Control Register 0x7D LPC Scratch Register 0x7E IPMC Scratch Register 0x7F POST codes from host 1. For LPC I/O accesses add the LPC I/O Base Address 0x600 Note: For LPC I/O address 0x80 is used. ATCA-7360 Installation and Use (6806800J07S)

  • Page 182: Module Identification Register

    Maps and Registers 6.4.3 Module Identification Register The Module Identification Register identifies the ATCA-7360 Blade (Wellbeck). Table 6-41 Module Identification Register Address Offset: 0x00 Description Default Access ATCA-7360 Blade (Wellbeck) Module Identification 0x60 6.4.4 Version Register The version register provides the version of the FPGA bit stream. The initial value starts at 0x01 and increments with each new release.

  • Page 183: Serial Over Lan (Sol) Control Register

    PWR_GOOD: 0 LPC: r/w 0: disabled IPMC: r 1: enabled. COM1 is forwarded to IMPC SOL over COM2 enable: PWR_GOOD: 0 LPC: r/w 0: disabled IPMC: r 1: enabled. COM2 is forwarded to IMPC Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 184: Serial Line Routing Register

    IPMC Power Level Register Table 6-46 IPMC Power Level Register Address Offset: 0x06 Description Default Access IPMC Power Level. IPMC writes a value, which PWR_GOOD:0 IPMC: r/w correspond to a defined power level. LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 185: Spd Prom Mux Control Register

    2. When the SPD PROM MUX is locked by BIOS (Bit 7 is set) the signal level of SMBUS_MUX1_IN is read. Write transactions are ignored. 3. When the SPD PROM MUX is locked by BIOS (Bit 7 is set) the signal level of BIOS_POST_CMPLT_IN is read. Write transactions are ignored. ATCA-7360 Installation and Use (6806800J07S)

  • Page 186: Reset Registers

    RTM_PB_RST_ Reset key at RTM PWR_GOOD:0 LPC: r/w1c 1: Reset occurred IPMC: r CPU_RST_ CPU Reset signal from CPU PWR_GOOD:0 LPC: r/w1c 1: Reset occurred IPMC: r XDP0_DBRST_ CPU Debugger reset PWR_GOOD:0 LPC: r/w1c 1: Reset occurred IPMC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 187: Reset Mask Register

    Address Offset: 0x11 Description Default Access Reserved PWR_GOOD:1 Spare switch SW3.4 PWR_GOOD:0 PB_RST_ faceplate push button reset PWR_GOOD:0 1: enabled 0: disabled Reserved PWR_GOOD:0 RTM_PB_RST_ Reset key at RTM PWR_GOOD:0 1: enabled 0: disabled Reserved PWR_GOOD:0 ATCA-7360 Installation and Use (6806800J07S)

  • Page 188: Bios Ipmc Watchdog Timeout Register

    The BIOS needs to write to this register to enable the Front Panel push button reset, the RTM push button reset and the IPMC reset. After a timeout of 8s the resets are armed again. ATCA-7360 Installation and Use (6806800J07S)

  • Page 189: Os Reset Source Register

    PB_RST_ faceplate push button reset PWR_GOOD:0 LPC: r/w1c 1: Reset occurred IPMC: r XDP1_DBRST_ CPU Debugger reset PWR_GOOD:0 LPC: r/w1c 1: Reset occurred IPMC: r RTM_PB_RST_ Reset key at RTM PWR_GOOD:0 LPC: r/w1c 1: Reset occurred IPMC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 190: Os Ipmc Watchdog Timeout Register

    Table 6-53 OS IPMC Watchdog Timeout Register Address Offset: 0x15 Description Default Access OS IPMC Watchdog Timeout: PWR_GOOD:0 LPC: r/w1c 1: IPMC Watchdog Timeout occurred IPMC: r OS IPMC Pre-Timeout PWR_GOOD:0 LPC: r/w1c 1: IPMC Pre-Timeout occurred IPMC: r Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 191: Ipmc Watchdog Timeout Register

    Address Offset: 0x16 Description Default Access IPMC Watchdog Timeout: PWR_GOOD:0 IPMC: r/w 0: No IPMC Watchdog Timeout 1: IPMC Watchdog Timeout occurred IPMC Pre-Timeout PWR_GOOD:0 IPMC: r/w 0: No IPMC Pre-Timeout 1: IPMC Pre-Timeout occurred Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 192: Ipmc Reset Source Register

    1: Reset occurred CPU_RST_ CPU Reset signal from CPU PWR_GOOD:0 IPMC: r/w1c 1: Reset occurred XDP0_DBRST_ CPU Debugger reset PWR_GOOD:0 IPMC: r/w1c 1: Reset occurred IPMC_RST_ REQ_ Payload Reset from IPMC. PWR_GOOD:0 IPMC: r/w1c 1: Reset occurred ATCA-7360 Installation and Use (6806800J07S)

  • Page 193: Rtm Spi Interface Registers

    SPI write transaction. The value of the RTM SPI Write Register is written to the SPI device. Table 6-57 RTM SPI Write Register Address Offset: 0x19 Description Default Access RTM SPI write data LPC: w ATCA-7360 Installation and Use (6806800J07S)

  • Page 194: Interrupt Control And Status Registers

    Interrupt input from payload Temp sensor Ext. LPC: r SFMEM_IRQ_ Interrupt from SFMEM Module Ext. LPC: r THERM_SEN0 IRQ request from 82599 Thermsen0 Ext. LPC: r THERM_SEN1 IRQ request from 82599 Thermsen1 Ext. LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 195: Processor Hot Status/Control Register

    Default Access CPU0_PRCHT_ IPMC signals interrupt Ext. LPC: r CPU1_PRCHT_ Interrupt input from payload Temp sensor Ext. LPC: r CPU0_PRCHT_ Interrupt from SFMEM Module LPC: r/w CPU1_PRCHT_ IRQ request from 82599 Thermsen0 LPC: r/w Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 196: Telecom Status/Control Register

    Each Interrupt source has an Interrupt Mask and Map Register. See the table below. Table 6-62 Address Map of Interrupt Mask and Map Registers Address Offset of Interrupt Interrupt Source Description Mask IPMC2HOST_INT_ IPMC signals interrupt 0x23 LM75_INT_ Interrupt input from payload Temp sensor 0x24 ATCA-7360 Installation and Use (6806800J07S)
  • Page 197 RTM_SPI_MISO RTM interrupt sources 0x2A CPU0_PRCHT_ CPU0 “Processor hot” interrupt 0x2B CPU1_PRCHT_ CPU1 “Processor hot” interrupt 0x2C Telecom Status/Control Active when at least one Status bit (bit 0, 1 or 2) is set. 0x2D Register ATCA-7360 Installation and Use (6806800J07S)

  • Page 198: Table 6-63 Interrupt Mask And Map Registers

    0x11: Frame number 17. IOCHK_ 0x12: Frame number 18. INTA_ 0x13: Frame number 19. INTB_ 0x14: Frame number 20. INTC_ 0x15: Frame number 21. INTD_ 0x16 – 0x1F: Frame number 22-31. IRQ Frame Number not valid. Value is ignored. ATCA-7360 Installation and Use (6806800J07S)

  • Page 199: Flash Status And Protection Registers

    0: SW1.2 OFF Recovery Boot SPI Flash Write Enable register, how to disable write protection 1: SW1.2 ON 0: Recovery Boot SPI Flash is unprotected 1: Recovery Boot SPI Flash is protected Reserved LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 200: Table 6-65 Default Boot Spi Flash Write Enable

    Table 6-65 Default Boot SPI Flash Write Enable Address Offset: 0x41 Description Default Access Default Boot SPI Flash Write enable/disable. LPC: w A write value 0xC3 enables the Boot Block. All other values disables the Boot Block ATCA-7360 Installation and Use (6806800J07S)

  • Page 201: Bios Boot Mode Register

    0: SW4.3 OFF Ext. 1: SW4.4 ON 0: SW4.4 OF Reserved 6.4.15 SFMEM Module Configuration Register Table 6-68 SFMEM Module Configuration Register Address Offset: 0x45 Description Default Access Control output signals SFMEM_CONF[3:0] PWR_GOOD:0 LPC: r/w IPMC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 202: Update Channel Equalization Control Register

    1: UC2_EQ_TX is tri-state. Control output Signal UC3_EQ_RX: LPC: r/w 0: UC3_EQ_RX is driven low. IPMC: r 1: UC3_EQ_RX is tri-state. LPC: r/w Control output Signal UC3_EQ_TX: IPMC: r 0: UC3_EQ_TX is driven low. 1: UC3_EQ_TX is tri-state. ATCA-7360 Installation and Use (6806800J07S)

  • Page 203: Ipmc E-Keying Status Register

    1: UC4_EQ_TX is tri-state. 6.4.17 IPMC E-Keying Status Register Table 6-70 IPMC E-Keying Status Register Address Offset: 0x49 Description Default Access IPMC_UPDCH_[4:0]. IPMC electronic key signals Ext. LPC: r IPMC_FAB1_10G_SEL_. Ext. LPC: r IPMC_FAB2_10G_SEL_. Ext. LPC: r Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 204: Ipmc E-Keying Control Register

    LPC: r/w 0: UPDCIF_LAN_DIS_ driven low. Disabled IPMC: r/w 1: UPDCIF_LAN_DIS_ driven high. Enabled Disable/Enable USB Port 8 to RTM. PWR_GOOD: 1 LPC: r/w 0: RTMUSB_ENABLE_ driven low. Enabled IPMC: r/w 1: RTMUSB_ENABLE_ driven high. Disabled ATCA-7360 Installation and Use (6806800J07S)

  • Page 205: Ipmc Gpio Register

    LPC: r/w 0: LED_USER1_ is driven high. IPMC: r 1: LED_USER1 is driven low. Control user LED output Signal LED_USER2_: LPC: r/w 0: LED_USER2_ is driven high. IPMC: r 1: LED_USER2 is driven low. Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 206: Nmi Status And Control Register

    Address Offset: 0x58 Description Default Access Diagnostic NMI Status LPC: r/w1c IPMC: r/w Diagnostic NMI Status LPC: r IPMC: r/w Watchdog NMI Status LPC: r/w1c IPMC: r/w Watchdog NMI Status LPC: r IPMC: r/w Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 207: Telecom Clock Supervision Registers

    16 bit value the result is always 0xFFFF. Table 6-77 Telecom CH1_CLK1A clock period MSB Register Address Offset: 0x61 Description Default Access MSB of CH1_CLK1A clock period PWR_GOOD: 0xFF LPC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 208: Telecom Timer Registers

    Status/Control Register. The Telecom Timer is reloaded with the timer start value stored in Telecom Timer LSB Register and Telecom Timer MSB Register and armed again, waiting for a rising edge of the input clock. ATCA-7360 Installation and Use (6806800J07S)

  • Page 209: Miscellaneous Status/Control Registers

    PWR_GOOD: 0 LPC: r/w 6.4.23 Miscellaneous Status/Control Registers Table 6-83 CPLD Version and Spare Signal Status Register Address Offset: 0x6F Description Default Access CPLD Version. The CPLD uses the signals Ext. CPLD_SPARE[3:1] CPLD_SPARE[4] Ext. Reserved ATCA-7360 Installation and Use (6806800J07S)

  • Page 210: Scratch Registers

    Table 6-84 LPC Scratch Register Address Offset: 0x45 Description Default Access LPC Scratch bits. PWR_GOOD:0 LPC: r/w IPMC: r Table 6-85 IPMC Scratch Register Address Offset: 0x45 Description Default Access IPMC Scratch bits. PWR_GOOD:0 LPC: r/w IPMC: r ATCA-7360 Installation and Use (6806800J07S)

  • Page 211: Serial Over Lan

    You can configure the SOL parameters via standard IPMI commands or via an open source tool called "ipmitool". Installing the ipmitool You can download the latest version of ipmitool from http://ipmitool.sourceforge.net. Documentation for this tool is also available on this site. ATCA-7360 Installation and Use (6806800J07S)

  • Page 212: Configure Sol Parameters

    You can use standard IPMI commands or the ipmitool to modify the parameters. 7.3.1 Using Standard IPMI Commands This example shows how to setup the SOL configuration parameter with standard IPMI commands. Ipmicmd is used on the local IPMC and the IP is configured. ATCA-7360 Installation and Use (6806800J07S)

  • Page 213: Using Ipmitool

    SOL session for Base Ethernet Channel 1 (channel 5) and Base Ethernet Channel 2 (channel 6): root@localhost:~# ipmitool lan print 5 Set in Progress : Set Complete Auth Type Support Auth Type Enable : Callback : : User : Operator : ATCA-7360 Installation and Use (6806800J07S)
  • Page 214 Auth Type Enable : Callback : : User : Operator : : Admin : OEM IP Address Source : Unspecified IP Address : 172.17.1.220 Subnet Mask : 255.255.0.0 MAC Address : 00:00:00:00:00:00 Default Gateway IP : 172.17.0.1 ATCA-7360 Installation and Use (6806800J07S)

  • Page 215: Establishing A Sol Session

    2. Compile and install the ipmitool on your target which is destined for opening the SOL session on the ATCA-7360 - for details refer to Installing the ipmitool on page 211. 3. Apply an IP address to the ATCA-7360 SOL interface - for details refer to Configure SOL Parameters on page 212.
  • Page 216 Serial Over LAN 6. Start ATCA-7360 SOL session on your target with the ipmitool and the configured IP address for the ATCA-7360 SOL interface. ipmitool -C 1 -I lanplus -H 172.16.0.221 -U soluser -P solpasswd -k gkey sol activate For details on the command parameters, refer to the ipmitool documentation available on http://ipmitool.sourceforge.net.

  • Page 217: Supported Ipmi Commands

    Table 8-2 Supported System Interface Commands Command NetFn (Request/Response) Set BMC Global Enables 0x06/0x07 0x2E Get BMC Global Enables 0x06/0x07 0x2F Clear Message Flags 0x06/0x07 0x30 Get Message Flags 0x06/0x07 0x31 Get Message 0x06/0x07 0x33 Send Message 0x06/0x07 0x34 ATCA-7360 Installation and Use (6806800J07S)

  • Page 218: Watchdog Commands

    2 sensor. Note: The options pre-timeout and power-cycle are not supported. Table 8-3 Supported Watchdog Commands NetFn Command (Request/Response) Reset Watchdog Timer 0x06/0x07 0x22 Set Watchdog Timer 0x06/0x07 0x24 Get Watchdog Timer 0x06/0x07 0x25 ATCA-7360 Installation and Use (6806800J07S)

  • Page 219: Sel Device Commands

    Set SEL Time 0x0A/0x0B 0x49 8.1.5 FRU Inventory Commands Table 8-5 Supported FRU Inventory Commands NetFn Command (Request/Response) Get FRU Inventory Area Info 0x0A/0x0B 0x10 Read FRU Data 0x0A/0x0B 0x11 Write FRU Data 0x0A/0x0B 0x12 ATCA-7360 Installation and Use (6806800J07S)

  • Page 220: Sensor Device Commands

    Get Sensor Event Enable 0x04/0x05 0x29 Get Sensor Event Status 0x04/0x05 0x2B Get Sensor Reading 0x04/0x05 0x2D Get Sensor Type 0x04/0x05 0x2F Set Event Receiver 0x04/0x05 0x00 Get Event Receiver 0x04/0x05 0x01 Platform Event 0x04/0x05 0x02 ATCA-7360 Installation and Use (6806800J07S)

  • Page 221: Chassis Device Commands

    Configurable Boot Property Corresponding Boot Parameter Number Selection between default and backup boot flash as device to boot from Selection between default and backup EEPROM as device where the on-board FPGA loads its configuration stream from ATCA-7360 Installation and Use (6806800J07S)

  • Page 222: Table 8-9 System Boot Options Parameter #96

    BIOS boot parameters as defined in Table 8-15 on page 8.1.7.1.1 System Boot Options Parameter #96 This boot parameter is an Artesyn-specific OEM boot parameter. Its definition is given in the following table. Table 8-9 System Boot Options Parameter #96...

  • Page 223: Table 8-10 System Boot Options Parameter #97

    Supported IPMI Commands 8.1.7.1.2 System Boot Options Parameter #97 This boot parameter is an Artesyn-specific OEM parameter. Its definition is given in the following table. Table 8-10 System Boot Options Parameter #97 Data Byte Description POST Type Data 1 - Set Selector. This is the processor ID for which the boot option is to be set.

  • Page 224: Table 8-11 System Boot Options Parameter #98

    If you want the boot firmware to read out and use the boot parameters stored in the default area and thus use the factory settings, you ATCA-7360 Installation and Use (6806800J07S)

  • Page 225: Figure 8-1 System Boot Options Parameter #100 - Information Flow Overview

    Details are given below. The following figure summarizes the previously explained basic information flow related to the system boot options parameter #100. Figure 8-1 System Boot Options Parameter #100 - Information Flow Overview ATCA-7360 Installation and Use (6806800J07S)

  • Page 226: Table 8-12 System Boot Options - Parameter #100 - Data Format

    The "Set Selector" field, on the other hand, is used to select either the default or user area. The following two tables describe in detail how the request and response data fields need to be filled and interpreted when performing SET and GET accesses ATCA-7360 Installation and Use (6806800J07S)

  • Page 227: Table 8-13 System Boot Options Parameter #100 - Set Command Usage

    Response Data 0x00: write successful 0x80: boot parameter storage not supported by the IPMC 0x81: storage area is locked by another software entity 0x82: illegal write-access 0xC9: block selector is outside of the allowed range. ATCA-7360 Installation and Use (6806800J07S)

  • Page 228: Table 8-14 System Boot Options Parameter #100 - Get Command Usage

    This is supported by HPI, for details refer to the System Management Interface Based on HPI-B User’s Guide related to your system environment. ATCA-7360 Installation and Use (6806800J07S)

  • Page 229: Table 8-15 System Boot Options Parameter #100 - Supported Parameters

    Supported IPMI Commands The following table lists boot parameters which can be configured for the ATCA-7360 blade, using the system boot option parameter #100. Artesyn provides the tool "ipmibpar" to interpret the ASCII parameters. To obtain the tool contact your local sales representative.

  • Page 230: Table 8-16 Boot_Order Devices

    Fabric Ethernet Interface Channel 1 fabricnet1 Fabric Ethernet Interface Channel 2 usb1 USB frontpanel 1 usb2 USB frontpanel 2 usbonboard USB onboard HDD usbartm USB artm usbkey USB key usbcdrom USB cdrom usbhdd USB hdd ATCA-7360 Installation and Use (6806800J07S)

  • Page 231: Lan Device Commands

    The following table provides the LAN Device Commands information. Table 8-17 Supported LAN Device Commands Command NetFn (Request/Response) Set LAN Configuration Parameters 0x0C/0x0D 0x01 Get LAN Configuration Parameters 0x0C/0x0D 0x02 Set SOL Configuration Parameters 0x0C/0x0D 0x21 Get SOL Configuration Parameters 0x0C/0x0D 0x22 ATCA-7360 Installation and Use (6806800J07S)

  • Page 232: Picmg 3.0 Commands

    Supported IPMI Commands PICMG 3.0 Commands The Artesyn IPMC is a fully compliant AdvancedTCA intelligent Platform Management Controller i.e. it supports all required and mandatory AdvancedTCA commands as defined in the PICMG 3.0 and AMC.0 R2.0 specifications. Table 8-18 Supported PICMG 3.0 Commands...

  • Page 233: Set/Get Power Level

    The blade supports two power levels. In case of a shelf which only allows 200W per slot the P- States of the blade will be restricted to match this requirement. The second power level has no restrictions. For more information, refer to Chapter 4, BIOS, on page ATCA-7360 Installation and Use (6806800J07S)

  • Page 234: Artesyn Specific Commands

    Supported IPMI Commands Artesyn Specific Commands The Artesyn IPMC supports several commands which are not defined in the IPMI or PICMG 3.0 specification but are introduced by Artesyn: serial output commands. Before sending any of these commands, the shelf management software must check ...

  • Page 235: Table 8-20 Request Data Of Set Serial Output Command

    LSB of Artesyn IANA Enterprise number. A value of 0xCD has to be used. Second byte of Artesyn IANA Enterprise number. A value of 0x65 has to be used. MSB of Artesyn IANA Enterprise number. A value of 0x00 has to be used.

  • Page 236: Get Serial Output Command

    LSB of Artesyn IANA Enterprise number. A value of 0xCD has to be used. Second byte of Artesyn IANA Enterprise number. A value of 0x65 has to be used. MSB of Artesyn IANA Enterprise number. A value of 0x00 has to be used.

  • Page 237: Pigeon Point Specific Commands

    Table 8-23 Response Data of Get Serial Output Command (continued) Byte Data Field LSB of Artesyn IANA Enterprise number. Second byte of Artesyn IANA Enterprise number. MSB of Artesyn IANA Enterprise number. Serial output selector Pigeon Point Specific Commands The IPMC supports additional IPMI commands that are specific to Pigeon Point. This section...

  • Page 238: Table 8-25 Ipmc Modes

    Manual standalone Manual standalone mode is equivalent to standalone mode with only one exception: carrier IPMC control over the on-carrier payload is automatically disabled in manual standalone mode. ATCA-7360 Installation and Use (6806800J07S)

  • Page 239: Get Status Command

    0: Normal 1: Standalone, for a description refer to Table 8-25 2: Manual Standalone, for a description refer to Table 8-25 Bit [0] Control If set to 0, the IPMC control over the payload is disabled. ATCA-7360 Installation and Use (6806800J07S)
  • Page 240 Bits [0:3] Clock Bus 1 Events These bits indicate pending Clock Bus 1 requests arrived from the shelf manager: 0: Clock Bus 1 Query 1: Clock Bus 1 Release 2: Clock Bus 1 Force 3: Clock Bus 1 Free ATCA-7360 Installation and Use (6806800J07S)

  • Page 241: Get Serial Interface Properties Command

    Interface ID 0: Serial Debug Interface Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 242: Set Serial Interface Properties Command

    Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Interface ID 0: Serial Debug Interface ATCA-7360 Installation and Use (6806800J07S)

  • Page 243: Get Debug Level Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 244: Set Debug Level Command

    Table 8-30 Set Debug Level Command Type Byte Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 ATCA-7360 Installation and Use (6806800J07S)
  • Page 245 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 246: Get Hardware Address Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Hardware Address If set to 00, the ability to override the hardware address is disabled. NOTE: A hardware address change only takes effect after an IPMC reset. Response Data Completion Code ATCA-7360 Installation and Use (6806800J07S)

  • Page 247: Get Handle Switch Command

    LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 Handle Switch Status 0x00: The handle switch is open. 0x01: The handle switch is closed. 0x02: The handle switch state is read from hardware. ATCA-7360 Installation and Use (6806800J07S)

  • Page 248: Set Handle Switch Command

    Byte Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code ATCA-7360 Installation and Use (6806800J07S)

  • Page 249: Set Payload Communication Time-Out Command

    0.1 to 25.5 seconds. Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 250: Enable Payload Control Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 251: Reset Ipmc Command

    Byte Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code ATCA-7360 Installation and Use (6806800J07S)

  • Page 252: Graceful Reset Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 253: Get Payload Shutdown Time-Out Command

    Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 Time-Out measured in hundreds of milliseconds, LSB first ATCA-7360 Installation and Use (6806800J07S)

  • Page 254: Set Payload Shutdown Time-Out Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Module Site ID Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)
  • Page 255 0: Payload power is bad. 1: Payload power is good. Bit [6] 0: IPMB-L buffer is not attached. 1: IPMB-L buffer is attached. Bit [7] 0: IPMB-L buffer is not ready. 1: IPMB-L buffer is ready. ATCA-7360 Installation and Use (6806800J07S)

  • Page 256: Enable Module Site Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Module Site ID Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)

  • Page 257: Reset Carrier Sdr Repository Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7360 Installation and Use (6806800J07S)
  • Page 258 Supported IPMI Commands ATCA-7360 Installation and Use (6806800J07S)

  • Page 259: Fru Information And Sensor Data Records

    Board part number Defined by Artesyn Embedded Technologies - Embedded Computing Product info area Product 'ARTESYN' manufacturer Product name Product name of the specific blade variant Product serial number Defined by Artesyn Embedded Technologies - Embedded Computing ATCA-7360 Installation and Use (6806800J07S)

  • Page 260: Mac Address Record

    PICMG 3.0, Rev.1.0. The contents are described in the section 'E- Keying'. User Info Area Artesyn OEM ID: 0x48, 0x0E, 0x00, 0x00 Followed by 255 byte of user info area data Custom usage Minimum 256 Byte available MAC Address Record The blade provides one OEM FRU record which contains information about on-board MAC addresses.

  • Page 261: Table 9-3 Artesyn Mac Address Descriptor

    Length Description MSB of Manufacturer ID. Write as 00h. Artesyn Record ID. 01h for Artesyn MAC Address Record. Record Format Version. 00h for this specification. Number of MAC Address Descriptors (N). Artesyn MAC Address Descriptors. Refer to Table 21 for definitions of Artesyn MAC Address Descriptor.

  • Page 262: E-Keying

    3 - NOT SET 1 (Fabric 0 -SET 0x02 Interface) 1 - SET 2 -SET 3 -SET 1 (Fabric 0 -SET 0x02 Interface) 1 - NOT SET 2 - NOT SET 3 - NOT SET ATCA-7360 Installation and Use (6806800J07S)
  • Page 263 0 - NOT SET 0xF3 Channel 1 - NOT SET Interface) 2 - SET 3 - NOT SET 2 (Update 0 - NOT SET 0xF4 Channel 1 - NOT SET Interface) 2 - NOT SET 3 - SET ATCA-7360 Installation and Use (6806800J07S)

  • Page 264: Power Configuration

    Sensor Data Records. Table 9-7 IPMI Sensors Sensor Sensor Name Sensor Type Number 1.2V Voltage 0x0A 1.5V Voltage 0x09 1.5V DDR3 Voltage 0x0C 1.8V Eth Voltage 0x08 12.0V Voltage 0x05 ATCA-7360 Installation and Use (6806800J07S)
  • Page 265 DDR 7 temp Temperature 0x1F DDR 8 temp Temperature 0x20 DDR 9 temp Temperature 0x21 DDR 10 temp Temperature 0x22 DDR 11 temp Temperature 0x23 DDR 12 temp Temperature 0x24 Fw Progress System Firmware Progress 0x11 ATCA-7360 Installation and Use (6806800J07S)
  • Page 266 Artesyn-specific Discrete 0x17 Digital PWR Entry Temp Temperature 0x2D PWR Entry Status OEM reserved 0x2E Power Good Entity Presence 0x16 Reset Source Artesyn-specific Discrete 0x18 Digital VCC CPU0 Voltage 0x0B Version change Version Change 0x02 ATCA-7360 Installation and Use (6806800J07S)

  • Page 267: Figure 9-1 Location Of Temperature Sensors

    FRU Information and Sensor Data Records The following figure shows the locations of all temperature sensors available on-board. Figure 9-1 Location of Temperature Sensors ATCA-7360 Installation and Use (6806800J07S)

  • Page 268: Table 9-8 Sensor Data Records

    0x2: IPMB-A disabled, IPMB-B enabled 0x3: IPMB-A enabled, IPMB-B enabled Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)
  • Page 269 Asrt / Deass Auto Temp 0x01 0x01 Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)
  • Page 270 0x0: No Bootable media Asrt Auto 0x1E discrete 0x6F Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)
  • Page 271 Reading according to EFI BIOS 0xD2 discrete port80 status codes. 0x6F Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)
  • Page 272 Asrt / Deass Auto 0x01 0x01 Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)
  • Page 273 Asrt / Deass Auto Temp 0x01 0x01 Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)
  • Page 274 0x1: Power Supply Failure detected 0x6F Asrt: Assertion Unr: Upper non-recoverable threshold Uc: Upper critical threshold Unc: Upper non-critical threshold Deass: Deassertion Lnr: Lower non-recoverable threshold Lc: Lower critical threshold Lnc: Lower non-critical threshold ATCA-7360 Installation and Use (6806800J07S)

  • Page 275: Firmware Upgrade

    3. Go to the directory where you have extracted the Ipmitool. Prompt>cd <path>/Ipmitool-<version> 4. Build the Ipmitool. Prompt>./configure && make && make install 10.1.2.1 Update Procedure The Ipmitool HPM update requires two steps for an update: 1. Upgrade the component. Example: ipmitool hpm upgrade <file> ATCA-7360 Installation and Use (6806800J07S)

  • Page 276: Interface

    Example from shelf manger: Prompt>Ipmitool -t 0x92 hpm upgrade <file> Example with RMCP+: Prompt>ipmitool -I lan -H 192.168.34.8 -U Administrator -P Administrator -t 0x92 hpm upgrade <file> ATCA-7360 Installation and Use (6806800J07S)

  • Page 277: Lan Over Ethernet (Base)

    IPMC Component Elements There are images for the boot loader and the firmware. There is also a combined image containing the boot loader and the firmware. The Boot loader update should only be done if it's required. ATCA-7360 Installation and Use (6806800J07S)

  • Page 278: Bios/Fpga Upgrade

    Both BIOS/FPGA boot banks can be updated with HPM.1. The BIOS/FPGA upgrade is not fully HPM.1 compatible. Payload update of this device is required. Without this update, automatic boot bank switching via the IPMC is not possible. Boot bank switching is a requirement for HPM.1 to activate. ATCA-7360 Installation and Use (6806800J07S)

  • Page 279: Figure 10-2 Spi Busses Connection

    Figure 10-2 SPI Busses Connection FPGA and BIOS upgrade may last from fifteen minutes up to two hours. The time varies with the selected programming interface. A power cycle is required after the BIOS/FPGA update. ATCA-7360 Installation and Use (6806800J07S)

  • Page 280: Upgrade Package

    HPM file contains only the firmware image 9806865F07E_A736BIOS-120.bin.hpm HPM file contains the version 1.2.0 BIOS image atca7360_spi_13_old.bin.hpm HPM file contains the version 0.13 FPGA image Ipmitool-1.8.9-pps-7.tgz PPS modified Ipmitool necessary for HPM upgrades on ATCA736X ATCA-7360 Installation and Use (6806800J07S)

  • Page 281: Replacing The Battery

    P9910 R1249 R1272 J242 C1463 R1236 CD10 C1490 CD10 CE29 C3026 R1235 J118 R1244 C4338 R1223 J117 C1480 C1453 R1221 R1252 R1276 T220 R1238 R1243 R1242 R1239 ZKEY2 ZKEY4 R1275 C1481 R1247 R1219 R1225 R1228 ATCA-7360 Installation and Use (6806800J07S)
  • Page 282 Replacing the Battery The battery provides data retention of seven years summing up all periods of actual data use. Artesyn, therefore assumes that there is usually no need to replace the battery except, for example, in case of long-term spare part handling.
  • Page 283 Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent this damage, do not use a screw driver to remove the battery from its holder. 2. Install the new battery following the "positive" and "negative" signs. ATCA-7360 Installation and Use (6806800J07S)
  • Page 284 Replacing the Battery ATCA-7360 Installation and Use (6806800J07S)

  • Page 285: Related Documentation

    The publications listed below are referenced in this manual. You can obtain electronic copies of Artesyn Embedded Technologies - Embedded Computing publications by contacting your local Artesyn sales office. For released products, you can also visit our Web site for the latest copies of our product documentation.

  • Page 286: Manufacturers' Documents

    PCI-SIG PCI Local Bus Specification Revision 2.2 PCI-X Addendum to the PCI Local Bus Specification 1.0 PICMG PICMG 3.0 Revision 1.0 Advanced TCA Base Specification PICMG 3.1 Revision 1.0 Specification Ethernet/Fiber Channel for AdvancedTCA Systems ATCA-7360 Installation and Use (6806800J07S)
  • Page 288 Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners. © 2016 Artesyn Embedded Technologies, Inc.

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