Pioneer HD-V9000 Service Manual page 93
Hd video system
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Also See for HD-V9000:
- Specification sheet (2 pages) ,
- Operating instructions manual (152 pages) ,
- Technical manual (27 pages)
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5
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3 7 63 1515 0
Genlock Detection Block
TP4622
DKF1003-A-T
0
R 4 5 2 8
K4520
K4521
R 4 5 3 5
TP4621
DKF1003-A-T
0
V+3R3DA_3
C 4 5 3 4
0.1u
IC4510
1
5
I N _ B
V C C
2
I N _ A
3
4
G N D
O U T _ Y
TC7SZ32FU
OR Gate
GNDD
N M
R 4 5 3 3
1 0 u / 1 6
C 4 5 3 2
C 4 5 3 6
DEMITAS
0.1u
GNDD
TE
L 13942296513
GNDD
TP4644
P4635
TP4576
P4643
TP4577
A T L 7 0 1 0 - A
L 4 5 0 8
TP4580
TP4578
GNDD
DEMITAS
L 4 5 0 9
A T L 7 0 1 0 - A
TP4583
L 4 5 1 0
A T L 7 0 1 0 - A
TP4582
A
1,2/18
A
1/18
www
.
5
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GENLOCKED
K4522
0V
K4523
0V
R 4 5 6 9
V+3R3DA_3
N M
V+3R3DA_3
C 4 5 4 0
0.1u
IC4511
1
5
I N _ B
V C C
K4522
2
DKF1003-A
I N _ A
1 0 0
3
4
G N D
O U T _ Y
V+3R3DA_3
R 4 5 7 0
TC7SZ32FU
C 4 5 4 5
0.1u
OR Gate
IC4513
GNDD
1
5
TP4620
0
I N _ B
V C C
R 4 5 8 0
2
DKF1003-A
I N _ A
1 0 0
3
4
G N D
O U T _ Y
R 4 5 7 6
TC7SZ32FU
OR Gate
GNDD
R 4 5 7 5
N M
FROM IC1001(MAIN CPU)
G S P I _ S C K
A
1/18
1:14G
# R E S E T _ E X T _ S Y N C
A
V+3R3D_2
1:10L;5D
# C S _ G S 4 9 1 1
FROM IC1001
(MAIN CPU)
1:14F
Sheet1
1:14G
G S P I _ D O U T
GNDD
DKF1003-A
K4505
1
LOCK_LOST
C 4 5 4 1
2
0.1u
REF_LOST
3
VID_PLL_VDD
#PCLK3
4
LVDS/PCLK3_GND
C 4 5 3 7
LVDS/PCLK3_VDD
VID_PLL_GND
PCLK3
5
Timing
X T A L _ V D D
C O R E _ V D D 2
0.1u
6
X 1
Generator
T I M I N G _ O U T _ 8
7
X 2
(Backward)
T I M I N G _ O U T _ 7
8
TP4579
X T A L _ G N D
T I M I N G _ O U T _ 6
9
C 4 5 3 8
C O R E _ G N D
T I M I N G _ O U T _ 5
1 0
6 5
GNDD
A N A L O G _ V D D
C E N T E R _ P A D
T I M I N G _ O U T _ 4
0.1u
1 1
N C 1
I O _ V D D 3
TP4517
1 2
G S 4 9 1 1 B C N E 3
A N A L O G _ G N D
T I M I N G _ O U T _ 3
I C 4 5 1 2
1 3
C 4 5 3 9
A U D _ P L L _ G N D
T I M I N G _ O U T _ 2
1 4
TIMING_OUT_1
AUD_PLL_VDD
ASR_SEL0
0.1u
VSYNC
1 5
10FID
ASR_SEL1
IO_VDD1
HSYNC
ASR_SEL2
1 6
TP4595
V+3R3DA_3
V+3R3DA_3
GNDD
GNDD
1:14B;2:10D;13D;4D
# R E S E T _ F L A S H
R 4 5 9 7
FROM IC1003
Sheet1
0
1:10L;13D;4D
GNDD
C L K _ E N A
FROM IC1001(MAIN CPU)
Sheet1
NOTES
NM
is Standby
without instruction
x
ao
RS1/16SS***J
[
]
y
RS1/16SS***F
[
]
F
without instruction
CKSSYB***K
i
[F/V]
(QYB)
CKSQYB***K
[F/V]
CH
CCSSCH***J
[F/V]
CH(D)
CCSSCH***D
[F/V]
CEHVAW***M**
[F/V]
***/**
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8
A
11/18
UNDESIRABLE
NO
VIDEO
VIDEO
FORMAT
INPUT
0V
3.3V
3.3V
3.3V
V+3R3DA_3
A
1/18
1:14E
TO IC1001
(MAIN CPU)
R E F _ L O S T
Sheet1
V+3R3DA_3
A
1/18
K4523
1:6L
TO IC1001
(MAIN CPU)
Sheet1
IRQ5
A
L O C K _ L O S T
1:10L;11J;4D
C L K _ E N A
FROM IC1001(MAIN CPU)
FROM IC1003
# R E S E T _ F L A S H
A
1:14B;2:10D;11J;4D
Sheet1
GNDD
V+1R8T1_3
1/18
GNDD
C 4 5 5 0
4 7 u / 1 6
V+3R3DA_3
C 4 5 5 1
0.1u
L 4 5 1 4
GNDD
V+3R3DA_3
A T L 7 0 1 0 - A
IC4515
1
1 4
1 C L R
V C C
2
1 3
R 4 5 9 6
1 D
2 C L R
R 4 5 4 9
3
1 2
1 C K
R 4 6 0 6
Q Q
2 D
4
1 1
2 2
3
6 7
1 3
R 4 6 0 7
1 P R
2 C K
TP4633
5
1 0
R 4 5 9 1
1 Q
2 P R
6
9
1 Q
2 Q
7
8
GNDD
G N D
2 Q
4 8
TC74VCX74FT
GNDD
TP4607
4 7
Timing Adj.
V+3R3DA_3
4 6
TP4606
4 5
4 4
TP4605
4 3
TP4604
4 2
4 1
TP4603
4 0
R 4 5 5 0 2 2
V+3R3DA_3
3 9
TP4601
TP4600
0.1u
3 8
TP4613
C 4 5 4 9
R 4 5 6 6
3 7
3 6
TP4598
4 7
3 5
TP4597
3 4
3 3
TP4599
GNDD
CLK NOISE CANCELLER
V+3R3DA_3
L 4 5 1 6
Timing Adj.
A T L 7 0 1 0 - A
IC4514
C 4 5 5 2
0.1u
1
1 4
1 C L R
V C C
2
1 3
R 4 6 0 3
1 0 k
1 D
2 C L R
3
1 2
R 4 6 0 4
1 0 k
1 C K
R 4 5 8 9
2 D
4
1 1
R 4 6 0 5
1 0 k
1 P R
1 0 k
2 C K
TP4636
R 4 5 9 4
5
1 0
1 Q
2 P R
R 4 5 9 0
1 0 k
6
9
TP4638
1 Q
2 Q
7
8
TP4639
1 0 k
G N D
2 Q
IC4521
0.1u
TC74VCX74FT
1
5
C 4 5 7 5
I N _ B
V C C
2
I N _ A
R 4 5 5 3
3
4
G N D
O U T _ Y
2 2
TP4627
GNDD
TC7SZ32FU
Signal Isolater
SEL
CLK IN
(IN_B)
(IN_A)
3.3V
IC4521
0V
u163
.
HD-V9000
6
7
2 9
9 4
2 8
DECM SERVICE ASSY (DXX2610)
• EXT SYNC BLOCK
V+3R3D_2
V+3R3D_2
SILK DISPLAY
"V+1R8T2_3"
Q 4 5 0 3
Q 4 5 0 1
D T C 1 1 4 Y U A
D T C 1 1 4 Y U A
GNDD
GNDD
3.3V
1.8V (FOR IC4512)
V+3R3D_2
3.3V
TP4532
D 4 5 0 7
1 S S 3 5 2
!
IC4519
1
V O U T
O N / O F F
2
V S S
3
TP4523
N C
S-1170B18UC-OTD
GNDD
1/18
Sheet1
Sheet1
1,2/18
CLK NOISE CANCELLER
SEL
CLK IN
CLK OUT
(IN_B)
(IN_A)
(OUT_Y)
3.3V
3.3V
IC4517
IC4518
0V
C 4 5 5 5
0.1u
IC4517
C 4 5 5 6
1 0 k
1
5
I N _ B
V C C
0.1u
DKF1003-A
1 0 k
2
1 5
0 5
8
2 9
9 4
K4508
I N _ A
1 0 k
3
4
G N D
O U T _ Y
1 0 k
TP4637
TC7SZ32FU
TP4609
TP4634
IC4518
GNDD
C 4 5 7 4
1
5
R 4 5 8 6
I N _ B
V C C
2
0.1u
1 0 k
I N _ A
3
4
G N D
O U T _ Y
GNDD
TC7SZ32FU
TP4608
GNDD
Signal Isolater
K4516
DKF1003-A-T
V+3R3DA_3
C 4 5 5 3
0.1u
IC4516
Audio Clock
TC74LCX125FTS1
24.576MHz
1
1 4
1 O E
V C C
2
1 3
1 A
4 O E
0
TP4574
3
1 2
1 Y
R 4 5 8 3
4 A
4
1 1
2 O E
4 Y
5
1 0
TP4623
2 A
TP4624
3 O E
6
9
10:8K;14:2C;15:2E
2 Y
3 A
A C L K _ H D M I
5 6
7
8
G N D
3 Y
R 4 5 6 2
TP4504
A C L K _ F P G A
6 8
TP4533
R 4 5 6 4
R 4 5 6 3
TP4536
2 2
GNDD
Audio Clock
BUFFER
GNDD
GNDD
GNDD
K4507
DKF1003-A
GNDD
GNDD
CLK OUT
(OUT_Y)
3.3V
(OFF)
(ON)
m
co
7
8
9 9
A
SILK DISPLAY
"V+1R8T1_3"
V+1R8T1_3
TP4531
1.8V
B
5
4
V I N
C
(OFF)
(ON)
Video Clock
27MHz/74.175MHz/74.25MHz
5:7A
2 8
9 9
V I C L K
R 4 5 6 1
3 3
TO IC2001
Sheet5
A
5/18
GNDD
TO IC2001
Sheet5
R 4 5 6 7
V I F S Y N C
2 2
5:7A
A
5/18
D
TO IC1001(MAIN CPU)
I R Q 0 _ V S Y N C
Sheet1
1:8K
A
1/18
A
10,14,15/18
IC4003(HDMI)
Sheet10
TO IC5503(AUDIO DAC)
Sheet14
IC5501(DIT)
Sheet15
4:14H
TO IC1502(FPGA)
Sheet4
TO IC2001
Sheet5
B A S E C L K
5:6J
A
5/18
A
4/18
E
F
A
11/18
93
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