ON Semiconductor Fairchild FAN302HL Design Manualline page 13

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AN-6094
where t
is MOSFET conduction time minimum input
ON
voltage and maximum load condition, given as:
2
1
P
L
. @
=
IN T
A m
t
min
ON
V
f
DL
S
Secondary-Side Diode : The nominal reverse voltage of
the diode is given in Equation (21).
The rms current of the rectifier diode is obtained as:
t
N
@
=
DIS
rms
PK
P
I
I
D
DS
N
S
The maximum voltage across the
(Design Example)
MOSFET is calculated as:
max
=
max
+
+
V
V
V
V
ds
DL
RO
OS
The rms current though the MOSFET is:
t
f
=
=
0.14
rms
PK
ON
s
I
I
DS
DS
3
The diode voltage and current are obtained as:
N
max
=
+
= +
5
S
V
V
V
D
O
DL
N
P
t
N
@
=
DIS
rms
PK
P
I
I
D
DS
3
N
S
[STEP-8] Determine the Output Filter Stage
The peak-to-peak ripple of capacitor current is given as:
N
Δ
=
PK
P
I
I
C
DS
N
S
The voltage ripple on the output is given by:
Δ
(
t
N
I
I
@
Δ
=
DIS
A
C
O
V
O
Δ
2
C
I
O
C
Sometimes it is impossible to meet the ripple specification
with a single-output capacitor due to the high ESR of the
electrolytic or tantalum capacitors. Additional LC filter
stages (post filter) can be used. When using post filters, do
not place the corner frequency too low. Too low corner
frequency may make the system unstable or limit the
control bandwidth. It is typical to set the corner frequency
of the post filter at around 1/10~1/5 of the switching
frequency.
Assuming a 330 µF tantalum
(Design
Example)
capacitor with 100 m Ω ESR for the output capacitor, the
voltage ripple on the output is:
N
Δ
=
=
PK
5.59
P
I
I
A
C
DS
N
S
Δ
(
t
I
I
@
Δ
=
DIS
A
C
O
V
Δ
O
2
C
I
O
C
Since the output voltage ripple exceeds the specification
© 2012 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 9/27/12
(41)
f
A
S
(42)
3
=
+
+
=
373 71 155
599
V
A
5
=
373 33.1
V
66
f
A
S
=
2.14
A
(43)
2
)
+ Δ
(44)
I
R
C
C
2
)
N
+ Δ
=
0.592
I
R
V
C
C
of 100 mV, a post LC filter should be used. Two 330 µF
capacitors and one 1.8 µH inductor are selected for the
post LC filter. Then, the cutoff frequency of the LC filter
is 9.2 kHz.
[STEP-9] Complete the RC Snubber Design
for the Diode
When the primary-side MOSFET is turned on, severe
voltage oscillation occurs across the secondary-side diode,
as shown in Figure 19. This is caused by the oscillation
between the diode parasitic capacitance (C
transformer secondary-side leakage inductance (L
reduce the oscillation, an RC snubber is typically used, as
shown in Figure 19. To effectively introduce damping to
the resonant circuit, the parameters of the RC snubber
should be:
L
=
LKS
R
SNB
C
D
=
2 ~ 3
C
times of C
SNB
The secondary-side leakage inductance and the diode
parasitic capacitance are difficult to measure with an LCR
meter. The best way is to use a test capacitor across the
diode. First, measure the natural resonance period (t
without connecting anything to the diode. Then, add a test
capacitor across the diode (C
resonance period (t
) becomes about twice its original
RT
value and measure the test resonance period. With the
measured t
, t
, and C
R
RT
TST
be calculated as:
t
=
2
/[(
)
1]
RT
C
C
D
TST
t
R
1
t
=
2
(
)
R
L
π
LKS
2
C
D
Figure 19. Diode Voltage Waveform
12
) and
D
). To
LKS
(45)
(46)
D
) such that the test
TST
; the resonance parameters can
(47)
(48)
π
2
L
C
LKS
D
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)
R

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