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AN-6094
Once the power dissipation in the snubber is obtained, the
snubber resistor is calculated as:
+
2
(
)
V
V
=
RO
OS
R
CL
P
CLMP
where R
is the clamping resistor.
CL
The maximum ripple of the clamping capacitor voltage is
obtained as:
+
V
V
Δ
=
RO
OS
V
CL
C R f
CL
CL s
In general, 5~10% ripple of the selected capacitor voltage
is reasonable. The clamping capacitor should be ceramic
or a material that offers low ESR. Electrolytic or tantalum
capacitors are unacceptable.
N
+
(
)
P
V
V
O
F
N
S
V
DL
Figure 17. RCD Clamping Circuit and Waveforms
The leakage inductance measured with an LCR meter
tends to be larger than the actual effective leakage
inductance. Moreover, the effective output capacitance of
the MOSFET is difficult to measure. The best way to
obtain these parameters correctly is to use the drain
voltage waveform as illustrated in Figure 18. Since L
be measured with an LCR meter, C
calculated from the measured resonant period.
In the clamping design in this section, the lossy discharge
of the inductor and stray capacitance is not considered. In
the actual converter, the loss in the clamping network is
less than the designed value due to this effect.
© 2012 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 9/27/12
(38)
(39)
(Design Example)
used, the voltage overshoot to limit the maximum drain
voltage below 600 V is:
V
The leakage inductance and the effective output
capacitance of MOSFET are calculated from the
resonance waveform as 18 µH and 55 pF, respectively.
The peak current of clamping diode is obtained as:
I
The power dissipation in the clamping circuit is
obtained as:
P
Then the clamping circuit resistor is calculated as:
R
The actual drain voltage can be lower than the design
due to the loss of stray resistance of inductor and
capacitor. The resistor value can be adjusted after the
power supply is actually built.
To allow less than 15 V ripple on the clamping
capacitor voltage, the clamping capacitor should be:
C
A 470 pF capacitor is selected.
[STEP-7] Calculate the Voltage and Current
of the Switching Devices
can
m
and L
can be
Primary-Side MOSFET : The voltage stress of the
OSS
LK
MOSFET
transformer turns ratio in STEP-6. The maximum voltage
stress of the MOSFET is given in Equations (35).
The rms current through the MOSFET is given as:
I
DS
11
π
2
L C
LK
OSS
Figure 18. Drain Voltage Waveform
Assuming that 700 V MOSFET is
max
<
−
−
=
600
V V
V
OS
DL
RO
C
=
2
−
(
)
PK
PK
OSS
I
V
CL
DS
L
LK
1
V
=
2
(
)
PK
RO
f L
I
CLMP
S
LK
CL
2
+
2
(
)
V
V
=
=
263
RO
OS
k
CL
P
CLMP
+
V
V
>
=
410
RO
OS
pF
Δ
CL
C
V f
CL
CL s
was
discussed
t
f
@
=
ON
A s
rms
PK
I
DS
3
π
2
L C
m
OSS
156
2
=
325
mA
OS
+
V
=
0.194
OS
W
V
OS
Ω
when
determining
the
(40)
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