Philips QV15.1E LA Service Manual page 60

EN 60 8. QV15.1E LA
8.3 Diagram 10-4-15 AUDIO
Block diagram
TAS5760LD
D V D D
Internal
Voltage
Supplies
SFT_CLIP
MCLK
Serial
SCLK
Audio
LRCK
Port
SDIN
DR_INA+
DirectPath
DR_INA-
Centered Headphone /
DR_INB+
Line Driver
DR_INB-
DR_OUTA
Pinning information
2015-Dec-18
IC Data Sheets
B15, TAS5760(IC U002)
D R V D D A N A _ R E G
Internal Reference
DRVDD
Regulators
Digital to
Digital
PWM
Boost
Conversion
Digital
&
Clipper
Volume
Analog
Control
Gain
Clock Monitoring
DRVDD
TM
Ground
Charge Pump
DR_OUTB DRVSS DR_CP DR_CN
1
SFT_CLIP
ANA_REG 2
VCOM 3
ANA_REF 4
SPK_FAULT 5
SPK_SD 6
FREQ/SDA 7
PBTL/SCL 8
DVDD 9
SPK_GAIN0 10
SPK_GAIN1
11
SPK_SLEEP/ADR
12
MCLK 13
SCLK 14
SDIN 15
LRCK
16
DGND
17
DR_INA-
18
DR_INA+ 19
DR_OUTA
20
DRGND
21
DR_MUTE
22
DRVSS
23
DR_CN
24
Figure 8-3 Internal block diagram and pin configuration
A V D D PVDD
Internal Gate
Drive Regulator
Closed Loop Class D Amplifier
Gate
Drives
Soft
Clipper
Gate
Drives
Internal Control Registers and State Machines
SPK_GAIN0 SPK_GAIN1
PBTL/ SPK_SD
SCL
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
PowerPAD
30
29
28
27
26
25
back to
div. table
GVDD_REG
Full Bridge
SPK_OUTA+
Power Stage
A
Over-
SPK_OUTA-
Current
SPK_OUTB+
Protection
Full Bridge
Power Stage
SPK_OUTB-
B
Die
Temp. Monitor
SPK_FAULT SPK_SLEEP/ FREQ/
ADR SDA
GVDD_REG
GGND
AVDD
PVDD
PVDD
BSTRPA+
SPK_OUTA+
PGND
SPK_OUTA-
BSTRPA-
BSTRPB-
SPK_OUTB-
PGND
SPK_OUTB+
BSTRPB+
PVDD
PVDD
DR_INB-
DR_INB+
DR_OUTB
DR_UVE
DRGND
DRVDD
DR_CP
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