Multiple Digital Inputs Mapping; Digital Input Configuration - ABB Relion 620 Series Protocol Manual

1MRS757645 B
3.4.4.1
3.4.4.2
620 series
Communication Protocol Manual
The MCD bit states are client-dependent. The MCD bit is only reset for the specific
Modbus client that reads it. Thus, other Modbus clients may still receive value 1 from
the same MCD bit when it is read.
MOM indication changes are captured in the IED's sequential Modbus event buffer.
Additionally, the Modbus event buffer provides a time stamp and chronology of
indication changes.
Latch bit
Some of the digital MOM+MCD points also incorporate a latch bit alternative. The
latch bit hides the MOM and MCD bits and instead returns the result of combining the
two bits with a logical OR operation. The MOM+MCD bits are generally used for this.

Multiple digital inputs mapping

Digital inputs related to two-bit DPC or DPS objects, for instance circuit breaker and
disconnectors, have a multiple mapping in the Modbus address space. The objects'
open and close bits are coded as MOM+MCD bit pair entities. The MCD bits reveals
if the object has changed its position several times since the Modbus master last
scanned it. In addition, the open and close bits are also coded using MOM values only,
among with a fault bit. The fault bit is set to "1" when the object is in intermediate (00)
or faulty (11) position.
Table 10: Bit treatment
Bits
Close MOM
Close MCD
Open MOM
Open MCD
:
Close MOM
Open MOM
Faulty position MOM
:
The MOM values are identical in each entity. The MCD bit is only reset if the MOM
bit in the same entity is read.

Digital input configuration

Digital input indications are mirrored on several Modbus memory areas. Indications
can be accessed in the Modbus Communication Management tool in PCM600, under
tabs: 1x – discrete inputs, 0x – read only coils, 3x – input registers and 4x – holding
registers. Digital inputs are read-only objects. Writing to the defined 0x and 4x
addresses results in an exception response.
Vendor-specific implementation
Treatment
One 2 bit entity
One 2 bit entity
One 1 bit entity
One 1 bit entity
One 1 bit entity
Section 3
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