Cirrus Logic CDB43131-GBK Manual page 38

CDB43131-GBK
Click the Calculate button to determine the frequencies of the SCLK and LRCLK signals. When this button is clicked, the
SCLK and LRCLK values will be calculated based on the selected frequency of Internal MCLK (MCLK_INT) and the
values in ASP Numerator, ASP Denominator, LRCLK high Time and LRCLK Period text boxes. The value in the LRCLK
Frequency text box will be used to set the new sample rate (if it is not already set by user) when the ASP is powered up.
Figure 38 Calculating ASP Clock Frequencies
It is recommended to use a profile script to configure this port since each field will be preconfigured correctly for the
proper mode.
38 DS1155V2DB1