Denon DN-X120 Service Manual page 14

MC9508AW32 Block Diagram
HCS08 CORE
BKGD/MS
BDC
HCS08 SYSTEM CONTROL
RESET
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
IRQ
RTI
IRQ
V
DDAD
V
SSAD
V
REFL
V
REFH
USER FLASH
(AW60 = 63,280 BYTES)
(AW48 = 49,152 BYTES)
(AW32 = 32,768 BYTES)
(AW16 = 16,384 BYTES)
USER RAM
AW60/48/32 = 2048 BYTES
AW16 = 1024 BYTES
INTERNAL CLOCK
GENERATOR (ICG)
LOW-POWER OSCILLATOR
V
DD
VOLTAGE
V
REGULATOR
SS
NOTES:
1. Port pins are software configurable with pullup device if input port.
2. Pin contains software-configurable pullup/pulldown device if IRQ is enabled
(IRQPE = 1). Pulldown is enabled if rising edge detect is selected (IRQEDG = 1)
3. IRQ does not have a clamp diode to V
4. Pin contains integrated pullup device.
5. Pins PTD7, PTD3, PTD2, and PTG4 contain both pullup and pulldown devices.
Pulldown enabled when KBI is enabled (KBIPEn = 1) and rising edge is selected
(KBEDGn = 1).
DEBUG
MODULE (DBG)
CPU
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI2)
COP
IIC MODULE (IIC1)
LVD
10-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC1)
SERIAL PERIPHERAL
INTERFACE MODULE (SPI1)
6-CHANNEL TIMER/PWM
MODULE (TPM1)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI1)
2-CHANNEL TIMER/PWM
MODULE (TPM2)
8-BIT KEYBOARD
INTERRUPT MODULE (KBI1)
. IRQ should not be driven above V
DD
RxD2
TxD2
SDA1
SCL1
AD1P7–AD1P0
8
AD1P15–AD1P8
SPSCK1
MOSI1
MISO1
SS1
TPM1CLK
TPM1CH5–
TPM1CH0 6
RxD1
TxD1
TPM2CLK
TPM2CH1–TPM2CH0
KBI1P7–KBI1P5
3
KBI1P4–KBI1P0
EXTAL
XTAL
.
DD
14
DN-X120
8
PTA7– PTA0
8
PTB7/AD1P7–
PTB0/AD1P0
PTC6
PTC5/RxD2
PTC4
PTC3/TxD2
PTC2/MCLK
PTC1/SDA1
PTC0/SCL1
8
PTD7/AD1P15/KBI1P7
PTD6/AD1P14/TPM1CLK
PTD5/AD1P13
PTD4/AD1P12/TPM2CLK
PTD3/AD1P11/KBI1P6
PTD2/AD1P10/KBI1P5
PTD1/AD1P9
PTD0/AD1P8
PTE7/SPSCK1
PTE6/MOSI1
PTE5/MISO1
PTE4/SS1
PTE3/TPM1CH1
PTE2/TPM1CH0
PTE1/RxD1
PTE0/TxD1
PTF7
PTF6
PTF5/TPM2CH1
PTF4/TPM2CH0
2
PTF3/TPM1CH5
PTF2/TPM1CH4
PTF1/TPM1CH3
PTF0/TPM1CH2
5
PTG6/EXTAL
PTG5/XTAL
PTG4/KBI1P4
PTG3/KBI1P3
PTG2/KBI1P2
PTG1/KBI1P1
PTG0/KBI1P0