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Notes: 1) Once each command of bit 0 to 4 is executed, the bit value does not return to the original value. In
order to execute the next command, write "0" into the bit corresponding to HL00 + 004C or HL00 +
014C once and check that the bit corresponding to HL00 + 004E or HL00 + 014E has turns to "0"
prior to the execution.
Command execution request register
Command completion response register
Command
2) "System set" and "Command" cannot be executed during an interruption occurrence. Only
clearance of the interruption can be carried out.
3) Even if write into HL00 + 004D, HL00 + 004F, HL00 + 014D, and HL00 + 014F, it is ignored.
8) HL00 + 0050 to 1, HL00 + 0150 to 1: Bank change-over request register
HL00 + 0052 to 3, HL00 + 0152 to 3: Bank change-over response register (read out only)
These are used when changing the bank of "12) HL00 + 0080 to HL00 + 00BF, HL00 + 0180 to
HL00 + 01BF: Address information bank register."
First, write a value ("01H to 06H") in "8) HL00 + 0050 to 1, HL00 + 0150 to 1: Bank change-over
request register" through the computer.
After 1 to 2 refresh times, the control board changes over the bank of, "12) HL00 + 0080 to HL00 +
00BF, HL00 + 0180 to HL00 01BF: Address information bank register" and writes the changed
bank number in " +/ WR +/ WR %DQN FKDQJHRYHU UHVSRQVH UHJLVWHU."
Notes: 1) In case a number other than "01H" to "06H" is written in "8) HL00 + 0050 to 1, HL00 + 0150 to 1:
Bank change-over request register," it compulsorily changes bank as "01H."
2) Do not read out / write in "12) HL00 + 0080 to HL00 + 00BF, HL00 + 0180 to HL00 + 01BF:
Address information bank register" until " +/ WR +/ WR %DQN FKDQJH
over response register" has been changed over.
3) Even if write into HL00 + 0051, HL00 + 0151, HL00 + 0053, and HL00 + 0153, it is ignored.
10) HL00 + 0054 to 5, HL00 +0154 to 5: Transmission stop / Reset
In order to stop the transmission of S-LINK V system, write "0FH" into HL00 + 0054 or HL00 +
0154. In order to restart it, write in the reset command.
This resets the S-LINK V system. (In case I/O setting has been changed at "4) I/O setting
switch (For port 1: SW1 / SW2, For port 2: SW4 / SW5)" in "4. Functional Description," the
FKDQJH LV UHÀHFWHG ,I ³(+´ LV ZULWWHQ LQ +/ RU +/ ,2 GDWD LV FOHDUHG DQG
then reset. In case "2DH" is written, I/O data is held and then reset. In case a value other than
these is written, it is ignored.
Even if the transmission mode or I/O control number is changed, the setting is not changed with
this reset command.
Note: Even if write into HL00 + 0055 and HL00 + 0155, it is ignored.
11) HL00 + 0056 to 7, HL00 + 0156 to7: Input hold / Input change interruption / Occurrence condition
HL00 + 0056 / HL00 + 0156
bit
7
6
5
4
3
Unused
(= 0)
Note: Even if write into HL00 + 0057 and HL00 + 0157, it is ignored.
bit 0: If the input signal is changed, "Input hold" selects whether the changed condition is main-
tained or not. (Usable for S-LINK V address 0 to 7 only. However, if hold is used at one
address, then all 0 to 7 are held.) If bit 0 is "1," even when the input signal is changed, the
condition is maintained until "0" is written in bit 0. After "0" has been written in bit 0, normal
transmission is resumed.
1
0
1
0
Execution
for input change interruption / Error interruption
2
1
0
2FFXUUHQFH FRQGLWLRQ IRU LQSXW FKDQJH LQWHUUXSWLRQ 21
The order of priority for each command of bit 0 to 3 is
bit 0 > 1 > 3 > 2.
Assignment
Input hold (1: Hold, 0: Hold cancel)
Input change interruption (1: Effective, 0: Ineffective)
Error interruption (1: Effective, 0: Ineffective)
2)) 2))
21
12
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