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Summary of Contents for Microsemi VSC8489
- Page 1 VSC8489/VSC8490/VSC8491 User Guide VSC8489/VSC8490/VSC8491 Evaluation Board June 2014...
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Page 2: Table Of Contents
5.10 Vitesse Command Line Interface ....................15 6 Usage Examples ........................... 17 6.1 Packet BIST ............................17 6.2 Packet BIST Part 2 ..........................17 6.3 IEEE 1588 ............................17 7 GPIO Pins ............................18 VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 3: Revision History
The revision history describes the changes that were implemented in this document. The changes are listed by revision, starting with the most current publication. Revision 1.0 Revision 1.0 of this datasheet was published in June 2014. This was the first publication of the document. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 4: Introduction
Gbps rates as well. Certain device variants support the IEEE 1588v2 protocol and/or MACsec protocol. One of the goals of the VSC8489/8490/8491 evaluation board (EVB) is to enable the user to observe the signal quality of the SFI I/Os through SMA connectors. AC-coupling caps serves as jumpers to switch the 10 G signals between SMAs and the SFP+ connector. - Page 5 VSC8489/VSC8490/VSC8491 Evaluation Board Figure 1 • VSC8490 Evaluation Board VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0...
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Page 6: Quick Start
VSC8489/VSC8490/VSC8491 Evaluation Board Quick Start The following items are recommended for use during an evaluation of the EVB: VSC8489/8490/8491 Evaluation Board (included in the kit) USB cable (included in the kit) Wall AC adaptor (included in the kit) GUI installation file (available on the website) -
Page 7: Hardware Options
VSC8489/VSC8490/VSC8491 Evaluation Board Hardware Options This sections shows the hardware options for the VSC8489/90/91 evaluation boards. Power Supply Options There are two methods to supply power to this evaluation board, from a wall acadapteror from a bench style power supply. -
Page 8: Software
If the device indicator (e.g., “VSC8490 Present”) does not turn green, first check the position of the on /off switch, SW2. If correct, check the voltage rails with a multimeter to ensure the VDD rails reached the proper levels, thus ruling out current limiting as the cause. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 9: Main Page
The PLL status box shows the host and line side PLL status per channel for the receive and transmit sides. The LED illuminates green when the appropriate PLL is activated after the mode has been initialized. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 10: Fpga
The FPGA page, shown below, lists all the FPGA registers. Clicking on any register will show their short description along with their address, default value, read/write capability, and its current value. Figure 5 • GUI: FPGA Page VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 11: Clocking Configuration
The VSC3308 Clock distribution device provides the option of routing different clock sources (Clk0, CLk1, Clk2, CLk3, CLk_J42/J44, CLk_J45/J46 or VCC6_XTAL) to VSC8489/VSC8490/VSC8491 Evaluation Board User Guide Revision 1.0 June 2014 Vitesse Proprietary and Confidential Page 13 of 23 destinations (J43, WRef, 1588_Ref, J48/J47-SMA, XRef, SRef). -
Page 12: Routing
PHY. Selecting the XAUI_Rx_0 from XAUI_Tx_0 is a same channel self loopback. Selecting the XAUI_Rx_0 from XAUI_Tx_1, and XAUI_Rx_1 from XAUI_Tx_0 at the same time, is a cross channel loopback. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 13: Bist
Figure 7 • GUI: Routing Page BIST The VSC8489 family of devices support two different built in self test (BIST) types. The first is an unframed PRBS31 pattern as described in section 50.3.8 of IEEE 802.3ae. The second is a packet based BIST. - Page 14 While enabled, the error count register polling is not interrupted when any other page is viewed. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0...
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Page 15: Sfp
Where options exist, the selected option will show as green while the remaining options will show as red. Although the device’s two-wire serial master can read the module contents, the default configuration accesses the module from the microcontroller. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 16: Register List
To write to a device register, highlight the desired register, enter the hexadecimal value in the “Value (Hex)” box and click Write. Clicking Read will read the same register showing the register’s new contents. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... -
Page 17: Vitesse Command Line Interface
Clicking on the Clear button will erase all previous commands sent from the CLI window. VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0... - Page 18 VSC8489/VSC8490/VSC8491 Evaluation Board Figure 12 • Command_Line_Interface VPPD-03745 VSC8489/VSC8490/VSC8491 User Guide Revision 1.0...
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Page 19: Usage Examples
VSC8489/VSC8490/VSC8491 Evaluation Board Usage Examples This section shows the usage examples for the VSC8489, VSC8490, and VSC8491 evaluation boards. Packet BIST Perform all steps outlined in section 2. On the BIST page. Check Enable in the Packet BIST box, this enables the Packet BIST. Click Read the TX pane. -
Page 20: Gpio Pins
The GPIO VSC8489/VSC8490/VSC8491 Evaluation Board User Guide Revision 1.0 June 2014 Vitesse Proprietary and Confidential Page 23 of 23 signals are also connected to the FPGA for on board control if desired. - Page 21 Microsemi. It is the Buyer's responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided "as is, where is" and with all faults, and the entire risk associated with such information is entirely with the Buyer.
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