Electrical Interface; Table 1. Connector Pin Description - Honeywell HG1120 Installation And Interface Manual

HG1120 Installation and Interface Manual

Electrical Interface

The pin assignments of the external system connector are shown below. Logic 0 corresponds
to the CMOS "low" logic state. Logic 1 corresponds to the CMOS "high" logic state.

Table 1. Connector Pin Description

PIN # SIGNAL NAME
1 DIO3
2 DIO4
3 SPI_SCLK
4 SPI_MOSI
5 SPI_MISO
SPI_SS
6
7 DIO1
8 RESET_N
9 DATA_RDY
10 DIO2
11,12 VDD
13 PWR_RTN
14 DGND
PWR_RTN
15
16 SER_DATA_OUT_H
17 No Connect
18 SER_DATA_OUT_L
19-21 No Connect
22 CAN_L
No Connect
23
24 CAN_H
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INPUT/OUTPUT & SIGNAL TYPE
Input - Device Configuration
CMOS compatible logic
Input – Device Configuration
CMOS Compatible Logic
Input
CMOS Compatible Logic
Input
CMOS Compatible Logic
Output
CMOS Compatible Logic
Input
CMOS Compatible Logic
Input – Device Configuration
CMOS Compatible Logic
Input – Device Configuration
CMOS Compatible Logic
Output
CMOS Compatible Logic
Input - Device Configuration
CMOS Compatible Logic
Input Power (3.0 – 5.5 VDC)
Power Return
Signal Return
Power Return
Output RS-422
N/A
Output RS-422
Bi-directional - ISO 11898-2
No Connect
Bi-directional - ISO 11898-2
SIGNAL FUNCTION
No connect results in Logic 1. Active low for logic 0.
No connect results in Logic 1. Active low for logic 0.
SPI Clock
SPI Master Out Slave In (MOSI) data.
SPI Master In Slave Out (MISO) data
SPI Slave Select (chip select), Default high, Active
low
No connect results in Logic 1. Active low for logic 0.
Logic 0 applied for 15 milli-seconds will stop all
processing. Upon logic 1, the IMU will restart as
if power had been removed and re-applied. No
connection is required.
Data Ready on Rising Edge to Logic 1.
@ Logic 1, maximum 500 micro-seconds.
No connect results in Logic 1. Active low for logic 0.
The input voltage should monotonically increase at
start with ripple < 30 mV P-P. The device draws < 0.4
Watts and 125 mA.
Return path for input power.
Use this pin to reference digital signals.
Return path for input power.
Asynchronous High
N/A
Asynchronous Low
Can Bus Low
Can Bus High
5