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Intersil ISL6442 User Manual

Dual pwm and linear controller evaluation board

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ISL6442 Dual PWM and Linear Controller Evaluation
Board User Guide
This application note describes how to use the ISL6442EVAL1Z
(Rev. C) board to evaluate the ISL6442 dual switching
regulator, plus one linear regulator. Refer to the schematic,
BOM (Bill of Materials), and board layout (at the end of this
document), as needed. The
ISL6442 datasheet
a reference.
Configuration
The outputs are set up as follows:
• Switcher V
= 1.8V @ 3A (with V
OUT1
• Switcher V
= 3.3V @ 3A (with V
OUT2
• Linear V
= 5.0V @ 0.3A (with V
OUT3
The outputs are switching at ~1.4MHz rate, based on the
resistor selected on the RT pin.
The current range for the switcher output that is presently
supported is limited by the FETs used. The FDS6912A dual FET
(in SO-8 package) can handle up to 3A. However, the ISL6442
gate drivers are capable of driving discrete upper and lower
FETs for up to 25A output current as well, even though not
supported on this board.
The linear output supports ~1W. The output current capability
of the linear regulator is determined mainly by the power
dissipation of the FET as mounted:
PV
= (V
-V
)*I
.
OUT3
IN3
OUT3
OUT3
FIGURE 1. ISL6442EVAL1Z BOARD PHOTO
November 28, 2011
AN1181.1
is also used as
= 6V)
IN
= 6V)
IN
= 6V)
IN3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Quick Start Evaluation
Figure 1 shows a photo of the populated board, and Figure 2
shows a plot of the top layer for reference, and details the
available input and output connections. Two switchers share
one input V
. The linear regulator has separate turrets for its
IN
input (V
) and GND. Each output has turrets for VOUT and
IN3
GND, plus a scope probe socket, for low noise waveforms.
V
= 6V
IN
V
OUT1
test
point
V
LOAD
OUT1
V
IN3
FIGURE 2. ISL6442EVAL1Z INPUT AND OUTPUT CONNECTIONS
Quick Start Setup (Light Load)
For a quick and easy test, one 6V supply is needed. Connect P1
(V
) and P7 (V
) to each other, and to the 6V supply; connect
IN
IN3
the supply GND to P2 and P9. Attach light loads to each
output.
Switch on the power supply; all three outputs should turn on to
their expected DC values; use a voltmeter or oscilloscope to
view them. VOUT1 and VOUT2 will have a ramp time of a few
milliseconds (VOUT3 will be much faster).
Note that the IC and all three inputs are sharing one supply
voltage in this simple example. The linear V
different, since it has its own input posts.
Board Features and Modifications
Heavier loads can be evaluated by placing them across the
appropriate output to GND. Resistors, electronic loads, or
Copyright Intersil Americas Inc. 2011. All Rights Reserved.
|
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1181
Author: Pengju Kong
I
out
A
+
V V
_
V
out
V
OUT2
= 6V
V
LOAD
OUT3
can certainly be
IN3
V
OUT2
test
point
LOAD

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Summary of Contents for Intersil ISL6442

  • Page 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Copyright Intersil Americas Inc. 2011. All Rights Reserved. AN1181.1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.
  • Page 2: Performance Waveforms

    Each output voltage is determined by a resistor divider from the 5ms/DIV; VIN3 = VIN output to its FB pin to GND. See the ISL6442 datasheet for the FIGURE 3. TYPICAL POWER-UP WAVEFORMS WITH VIN formulas to calculate the values. Note that there are some Figure 4 shows the detail soft start waveform of PWM1 (PMW2 limitations;...
  • Page 3 The high-current MOSFET drivers of the ISL6442 yield a highly efficient power conversion solution with a reduced number of external components in a compact footprint.
  • Page 4 +5.0V VOUT3 5.11K 0.3A 68UF 10UF DRAWN BY: DATE: ENGINEER: DATE: TIM KLEMANN 0.1UF 01/24/2007 THEJU BERNARD RELEASED DATE: TITLE: ISL6442 37.4K SGND DATE: UPDATED BY: EVALUATION BOARD 5.11K TESTER SCHEMATIC OPEN OPEN HRDWR ID MASK# REV. ISL6442EVAL1Z FILENAME: SHEET...
  • Page 5 Application Note 1181 TABLE 1. BILL OF MATERIALS ITEM PART REFERENCE VALUE DESCRIPTION PART # MANUFACTURER C28-C31 100µF CAP-TANT LOWESR, SMD, D3, 100µF, 10V, 10TPB100M SANYO 20%, POSCAP, ROHS 68µF CAP, SMD, 6x3.2, 68µF, 10V, 20% POSCAP, 10TPB68MC SANYO ROHS C2, C3, C13, C19 0.1µF CAPACITOR, SMD, 0603, 0.10µF, 50V, 10%,...
  • Page 6 Application Note 1181 (Continued) TABLE 1. BILL OF MATERIALS ITEM PART REFERENCE VALUE DESCRIPTION PART # MANUFACTURER R5, R14, R23, R24 0Ω RESISTOR, SMD, 0603, 0Ω, 1/10W, TF, Generic ROHS 100Ω RES, SMD, 0603, 100Ω, 1/10W, 1%, TF, Generic ROHS 10.2kΩ...
  • Page 7 Application Note 1181 ISL6442EVAL1Z Board Layout FIGURE 8. TOP SILKSCREEN FIGURE 9. TOP LAYER FIGURE 10. 2ND LAYER FIGURE 11. 3RD LAYER AN1181.1 November 28, 2011...
  • Page 8 FIGURE 13. BOTTOM SILKSCREEN Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding.
  • Page 9 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Intersil ISL6442EVAL1Z...

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