Intersil ISL62881CGPUEVAL2Z User Manual

ISL62881CGPUEVAL2Z Evaluation Board User Guide

Hardware Description

The ISL62881CGPUEVAL2Z evaluation board
demonstrates the performance of the ISL62881C
single-phase synchronous-buck PWM GPU V
controller implementing Intel IMVP-6.5 protocol. The
ISL62881C features Intersil's Robust Ripple Regulator
3
(R ™) technology. An on-board dynamic-load generator
is included for evaluating the transient-load response. It
applies a 300µs pulse of approximately 0.2Ω load across
V and PGND.
O
Contents of this document include:
• Design Criteria
• Recommended Test Equipment
• Interface Connections
• Switch Descriptions
• DIP Switch Descriptions
• Jumper Descriptions
• Test Point Descriptions
• Evaluation Board Documentation
- Bill of materials
- Schematic
- Silk-screen plots
- Board layer plots
TABLE 1. DC/DC DESIGN CRITERIA
PARAMETER
V
IN
V
O
Full-load
PWM Frequency
Recommended Equipment
• (Qty. 1) Adjustable 25V, 10A Power Supply
• (Qty. 1) Fixed 5V, 100mA Power Supply
• (Qty. 1) Fixed 12V, 100mA Power Supply
• (Qty. 1) Adjustable Constant Current Electronic Load
• (Qty. 1) Digital Voltmeter
• (Qty. 1) Four-Channel Oscilloscope
March 24, 2010
AN1553.0
CORE
VALUE UNITS
4.5 to 20 VDC
0 to 1.5 VDC
26 ADC
300 kHz
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Application Note AN1553
Interface Connections
• V : Input Voltage to the Power Stage
IN
- J5: V Positive Power Input
IN
- TP31: V Positive Voltage Sense
IN
- J6: V Return Power Input
IN
- TP32: V Return Voltage Sense
IN
• V Regulated Output Voltage
O:
- J12: V Positive Power Output
O
- J14: V Return Power Output
O
• +5V: +5V Input Voltage
- TP29: +5V Positive Input
- TP30: +5V Return Input
• +12V: Input Voltage for the Dynamic-load Generator
- TP3: 12V Positive Input
- TP2: 12V Return Input
Test Set-Up
TP18 TP14
RTN VSEN
_
J6
PGND
Vin
J5
+
VIN
ISL62881CGPUEVAL2Z
TP3
TP2
on
S2
off
J10
VCORE
FIGURE 1. TEST SET-UP
Switch Descriptions
• S3: Enable
- OFF: Short the VR_ON pin to GND (disable PWM)
- ON: Allow the VR_ON pin to pull-up to +5V
(enable PWM)
• S2: Dynamic Load
- OFF: On-board dynamic load disabled
- ON: On-board dynamic load enabled
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Author: Jia Wei
on
S3
off
1
S1
D1 U2
0 1
0
VID0
VID1
VID2
VID3
VID4
VID5
VID6
TP37
J16
+3.3V
TP29
+
+5V
5V
_
TP30
PGND
J12
VCORE
J14
PGND