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620x3 Host Interface
HI-620x3 features a 16 bit parallel data bus and has 64K x 16 word SRAM address space. It is offered in
an 80 pin QFP or QFN package.
The 620x3 has data transfer speeds that depend on which of the four available clock frequencies is
selected. The board is supplied with a 50MHz XTAL oscillator module, so by default the software will set
up 50MHz operation. However an external clock can be input through SMA connector J4, if this is done
jumper J7 should be connected. The device will run on a 50, 40, 20 or 16MHz clock, but the appropriate
register setting must be sent to register 0x18.
Control Switches
SW2 has six control functions that affect operation of the HI-620x3, these are explained in the
configuration section, please check they are in the default position before continuing.
RT address set up
The RT terminal address is set using DIP switches, before applying power. RT addresses 3 and 4
are utilized by the preprogrammed Bus Controller message repertoire. The 6-position DIP switch
SW1 should already be set with the address value 03, plus odd parity.
1760 Mode (all devices)
In this mode, the RT device responds with the Status Word's Busy bit set within 2ms of Master
Reset pin rising edge. To test this feature, the device can be powered up without the software
running (for example by using SW1 RESET switch to hold the MCU in reset). If the MSCLR switch
is toggled on the ADK (SW2/3) the device can quickly respond to a BC command with the 'Busy'
bit set.
1553 Bus Interface
Note 1: Connecting Bus Negative to ground is strictly a bench test convenience feature. Most
performance characteristics of transmitted and received 1553 signals are specified using
differential line-to-line measurements at the bus stub, Bus Positive minus Bus Negative. This
corresponds to the red and black "BUS" test points adjacent to the transformers on the right
side of the upper circuit board. While two oscilloscope probes connected to red and black may
be used in conjunction with scope's Ch1-Ch2 math function, a single probe connected to Bus
Positive provides the same signal display when Bus Negative is grounded. This frees up scope
probes for other purposes. The nINCMD (TP4) signal can be used to trigger the scope as shown
in magenta trace on plots from the next page, this signal goes low during 1553 activity.
Do not include a provision for grounding Bus Negative in your production design.
Note 2: For stand-alone testing (without connection to a conventional MIL-STD 1553 bus) the hardware
provides on-board 70Ω termination resistors. This is strictly a bench test convenience feature
Holt Integrated Circuits
9
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