ATA R
EGISTERS
S
R
TATUS
EGISTER
The Status register provides the device's current status to the host. The status
register is an 8-bit read-only register. When the contents of the register are
read by the host, the IREQ# bit is cleared.
Operation
Read/Write
Default Value
Bit(s)
Description
7
Busy (BSY). Set when the drive is busy and unable to process any
new ATA commands.
6
Data Ready (DRDY). Set when the device is ready to accept ATA
commands from the host.
5
Drive Write Fault (DWF). Always set to 0.
4
Drive Seek Complete (DSC). Set when the drive heads have been
positioned over a specific track.
3
Data Request (DRQ). Set when a device is ready to transfer a word
or byte of data to or from the host and the device.
2
Corrected Data (CORR). Always set to 0.
1
Index (IDX). Always set to 0.
0
Error (ERR). Set when an error occurs during the previous ATA
command.
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
3600D-04DSR
Table 24: Status Register
D
D
D
7
6
BSY
DRDY
DWF
0
0
S
S
ILICON
YSTEMS
All unauthorized use and/or reproduction is prohibited.
P
23
AGE
SSD-D
XXX
D
D
5
4
3
DSC
DRQ
0
0
0
P
ROPRIETARY
(I)-3600 D
S
ATA
HEET
D
D
D
2
1
0
CORR
IDX
ERR
0
0
0
F
2, 2009
EBRUARY
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